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23 xosc_hw->startup = startup_delay;
24
25 // Set the enable bit now that we have set freq range and startup delay
26 hw_set_bits(&xosc_hw->ctrl, XOSC_CTRL_ENABLE_VALUE_ENABLE << XOSC_CTRL_ENABLE_LSB);
27
28 // Wait for XOSC to be stable
29 while(!(xosc_hw->status & XOSC_STATUS_STABLE_BITS));
30 }
Adding 128
ensures the
integer result
is always
rounded up
2.15.7. List of registers
Table 250. List of
XOSC registers
Offset Name Info
0x00 CTRL Crystal Oscillator Control
0x04 STATUS Crystal Oscillator Status
0x08 DORMANT Crystal Oscillator Power down control
0x0c STARTUP Controls the startup delay
0x10 DIV2 Controls the optional div2 output
0x14 PADREFCLK Selects the clock to be output to the reference clock pad
0x18 CLKSRC Controls the general purpose clock outputs clksrc and clksrc_ph
0x1c COUNT A down counter running at the xosc frequency which counts to
zero and stops.
CTRL Register
Description
Crystal Oscillator Control
Table 251. CTRL
Register
Bits Name Description Type Reset
31:24 Reserved. - - -
23:12 ENABLE Think carefully before disabling. An invalid setting will
enable the oscillator.
0xd1e -> DISABLE
0xfab -> ENABLE
RW -
11:0 FREQ_RANGE Frequency range. An invalid setting will retain the previous
value. The actual value being used can be read from
STATUS_FREQ_RANGE
0xaa0 -> 1_15MHZ
0xaa1 -> RESERVED_1
0xaa2 -> RESERVED_2
0xaa3 -> RESERVED_3
RW -
STATUS Register
Description
Crystal Oscillator Status
Table 252. STATUS
Register
Bits Name Description Type Reset
31 STABLE Oscillator is running and stable RO 0x0
RP2040 Datasheet
2.15. Crystal Oscillator (XOSC) 194