Datasheet

Table Of Contents
Description
enable clock in sleep mode
Table 243. SLEEP_EN1
Register
Bits Name Description Type Reset
31:15 Reserved. - - -
14 clk_sys_xosc RW 0x1
13 clk_sys_xip RW 0x1
12 clk_sys_watchdog RW 0x1
11 clk_usb_usbctrl RW 0x1
10 clk_sys_usbctrl RW 0x1
9 clk_sys_uart1 RW 0x1
8 clk_peri_uart1 RW 0x1
7 clk_sys_uart0 RW 0x1
6 clk_peri_uart0 RW 0x1
5 clk_sys_timer RW 0x1
4 clk_sys_tbman RW 0x1
3 clk_sys_sysinfo RW 0x1
2 clk_sys_syscfg RW 0x1
1 clk_sys_sram5 RW 0x1
0 clk_sys_sram4 RW 0x1
ENABLED0 Register
Description
indicates the state of the clock enable
Table 244. ENABLED0
Register
Bits Name Description Type Reset
31 clk_sys_sram3 RO 0x0
30 clk_sys_sram2 RO 0x0
29 clk_sys_sram1 RO 0x0
28 clk_sys_sram0 RO 0x0
27 clk_sys_spi1 RO 0x0
26 clk_peri_spi1 RO 0x0
25 clk_sys_spi0 RO 0x0
24 clk_peri_spi0 RO 0x0
23 clk_sys_sio RO 0x0
22 clk_sys_rtc RO 0x0
21 clk_rtc_rtc RO 0x0
20 clk_sys_rosc RO 0x0
19 clk_sys_rom RO 0x0
RP2040 Datasheet
2.14. Clocks 189