Datasheet

Description
enable clock in sleep mode
Table 242. SLEEP_EN0
Register
Bits Name Description Type Reset
31 clk_sys_sram3 RW 0x1
30 clk_sys_sram2 RW 0x1
29 clk_sys_sram1 RW 0x1
28 clk_sys_sram0 RW 0x1
27 clk_sys_spi1 RW 0x1
26 clk_peri_spi1 RW 0x1
25 clk_sys_spi0 RW 0x1
24 clk_peri_spi0 RW 0x1
23 clk_sys_sio RW 0x1
22 clk_sys_rtc RW 0x1
21 clk_rtc_rtc RW 0x1
20 clk_sys_rosc RW 0x1
19 clk_sys_rom RW 0x1
18 clk_sys_resets RW 0x1
17 clk_sys_pwm RW 0x1
16 clk_sys_psm RW 0x1
15 clk_sys_pll_usb RW 0x1
14 clk_sys_pll_sys RW 0x1
13 clk_sys_pio1 RW 0x1
12 clk_sys_pio0 RW 0x1
11 clk_sys_pads RW 0x1
10 clk_sys_vreg_and_
chip_reset
RW 0x1
9 clk_sys_jtag RW 0x1
8 clk_sys_io RW 0x1
7 clk_sys_i2c1 RW 0x1
6 clk_sys_i2c0 RW 0x1
5 clk_sys_dma RW 0x1
4 clk_sys_busfabric RW 0x1
3 clk_sys_busctrl RW 0x1
2 clk_sys_adc RW 0x1
1 clk_adc_adc RW 0x1
0 clk_sys_clocks RW 0x1
SLEEP_EN1 Register
RP2040 Datasheet
2.14. Clocks 188