Datasheet

Table 187. Power-on
Reset Parameters
Parameter Description Min Typ Max Units
DVDD
TH.POR
power-on reset
threshold
0.924 0.957 0.99 V
t
POR.ASSERT
power-on reset
assertion delay
3 10 μs
2.11.3. Brown-out Detection
The brown-out detection block prevents unreliable operation by initiating a power-on reset cycle if the digital core supply
(DVDD) drops below a safe operating level. The block’s bod_n output is taken low if DVDD drops below the brown-out
detection threshold (DVDD
TH.BOD
) for a period longer than the brown-out detection assertion delay (t
BOD.ASSERT
). This re-
initialises the power-on reset block, which resets the chip, by taking its por_n output low, and holds it in reset until DVDD
returns to a safe operating level. Figure 21 shows a brown-out event and the subsequent power-on reset cycle.
DVDD
por_n
bod_n
DVDD
TH.BOD
DVDD
TH.POR
t
POR.ASSERT
t
BOD.ASSERT
Figure 21. A brown-out
detection cycle
2.11.3.1. Detection Enable
Brown-out detection is automatically enabled at initial power-on or after a brown-out initiated reset. There is, however, a
short delay, the brown-out detection activation delay (t
BOD.ACTIVE
), between por_n going high and detection becoming active.
This is shown in Figure 22.
DVDD
por_n
bod_n
DVDD
TH.POR
detection
inactive
detection
inactive
detection
active
detection
active
DVDD
TH.BOD
DVDD
TH.POR
t
POR.ASSERT
t
BOD.ACTIVE
t
POR.ASSERT
t
BOD.ACTIVE
t
BOD.ASSERT
Figure 22. Activation
of brown-out detection
at initial power-on and
following a brown-out
event.
Once the chip is out of reset, detection can be disabled under software control. This also saves a small amount of power.
If detection is subsequently re-enabled, there will be another short delay, the brown-out detection enable delay (t
BOD.ENABLE
),
before it becomes active again. This is shown in Figure 23.
Detection is disabled by writing a zero to the EN field in the BOD register and is re-enabled by writing a one to the same
field. The block’s bod_n output is high when detection is disabled.
RP2040 Datasheet
2.11. Chip-Level Reset 149