Datasheet

50
(VDDINT = 1.0 V  5 %, T
J
= –25 to 85C, VDDext = 3.3 V  10 %, load = 30 pF)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Ch 0
SPI MOSI Master Output Delay time
t
SPIMOD
–
–
6
ns
SPI MISO Master Input Setup time (FB_CLK_SEL = 00)
t
SPIMIS
13
–
–
SPI MISO Master Input Setup time (FB_CLK_SEL = 01)
8
–
–
SPI MISO Master Input Setup time (FB_CLK_SEL = 10)
3
–
–
SPI MISO Master Input Setup time (FB_CLK_SEL = 11)
-2
–
–
SPI MISO Master Input Hold time
t
SPIMIH
5
–
–
SPI MOSI Slave Input Setup time
t
SPISIS
4
–
–
ns
SPI MOSI Slave Input Hold time
t
SPISIH
5
–
–
SPI MISO Slave Output Delay time
t
SPISOD
–
–
18
SPI nSS Master Output Delay time
t
SPICSSD
8
–
–
SPI nSS Slave Input Setup time
t
SPICSSS
6
–
–
Ch 1
SPI MOSI Master Output Delay time
t
SPIMOD
–
–
5
SPI MISO Master Input Setup time (FB_CLK_SEL = 00)
t
SPIMIS
14
–
–
ns
SPI MISO Master Input Setup time (FB_CLK_SEL = 01)
9
–
–
SPI MISO Master Input Setup time (FB_CLK_SEL = 10)
4
–
–
SPI MISO Master Input Setup time (FB_CLK_SEL = 11)
-1
–
–
SPI MISO Master Input Hold time
t
SPIMIH
5
–
–
SPI MOSI Slave Input Setup time
t
SPISIS
4
–
–
SPI MOSI Slave Input Hold time
t
SPISIH
5
–
–
ns
SPI MISO Slave Output Delay time
t
SPISOD
–
–
19
SPI nSS Master Output Delay time
t
SPICSSD
8
–
–
SPI nSS Slave Input Setup time
t
SPICSSS
6
–
–
Note: SPICLKout = 50 MHz
 tSPIMIS,CH0 = 12 – (cycle period/4) x FB_CLK_SEL
 tSPIMIS,CH1 = 13 – (cycle period/4) x FB_CLK_SEL