Datasheet

 MAC supports the following features:

 10/100/1000 Mbps data transfer rates with an RGMII interface to communicate with external Gigabit PHY

 Full duplex operation

 Half duplex operation

 Flexible address filtering

 Additional frame filtering

The ARTIK 530 Module provides one shared SD-card/MMC interface. The Mobile Storage Host is an interface between the

system and the SD-card. The key features of mobile storage host sub-system are:

 Support for Secure Digital I/O (SDIO – version 3.0)

 Support for Secure Digital Memory (SDMEM – version 3.0)

 Support for Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)

 Support 4-bit SDR mode up to 50MHz

 Supports PIO and DMA mode data transfer

 Supports ¼- bit data bus width

The ARTIK 530 Module provides one shared SD-card/MMC interface. The Mobile Storage Host is an interface between the

system and MMC card. The key features of mobile storage host sub-system are:

 Support for Embedded Multimedia Cards (MMC – version 4.41)

 Support for Embedded Multimedia Cards (eMMC – version 4.5)

 Support 4-bit SDR mode up to 50MHz

 Supports PIO and DMA mode data transfer

 Supports ¼- bit data bus width

The ARTIK 530 Module has DDR memory. The key features of the DDR memory present on the ARTIK 530 Module are:

 One 32-bit DDR3 memory interface

 Two 256MB DDR3 16-bit memory chips, for a total of 512MB

 Up to 800MHz DDR3 speed with a maximum throughput of 6.4GB/s

Our JTAG core that is part of the ARTIK 530 Module provides debug capabilities for the developer. The main features of the

JTAG module are:

 Compliant with the IEEE 1149 standard

 Can only be used together with the ARTIK 530 Module.

The ARTIK 530 Module has a dedicated Secure Element to assure end-to-end authentication and communication between

nodes in an IoT setting. The Secure Element provides an ISO/IEC 7816 14443 compliant interface. The most important

hardware features of the Secure Element are:

 Dedicated 16-bit SecuCalm CPU core

 Crypto co-processor

 Modular exponential accelerator

 RSA 2080 bits

 ECC 512 bits

 Data security

 Memory encryption for all memory

 256B read only and 256B non erasable flash area

 Selective reset operation if abnormal voltages/frequencies are detected