Datasheet
Application hints LIS3DH
20/54 DocID17530 Rev 2
4 Application hints
Figure 5. LIS3DH electrical connections
The device core is supplied through the Vdd line while the I/O pads are supplied through the
Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 μF aluminum) should
be placed as near as possible to pin 14 of the device (common design practice).
All the voltage and ground supplies must be present at the same time to have proper
behavior of the IC (refer to Figure 5). It is possible to remove Vdd maintaining Vdd_IO
without blocking the communication bus, in this condition the measurement chain is
powered off.
The functionality of the device and the measured acceleration data is selectable and
accessible through the I
2
C or SPI interfaces.When using the I
2
C, CS must be tied high.
ADC1, ADC2 & ADC3 if not used can be left floating or connected to Vdd or GND.
The functions, the threshold and the timing of the two interrupt pins (INT1 and INT2) can be
completely programmed by the user through the I
2
C/SPI interface.
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