Datasheet
Table Of Contents
- Document Information
- Contents
- 1 Functional description
- 2 Interfaces
- 3 Pin definition
- 4 Electrical specifications
- 4.1 Absolute maximum rating
- 4.2 Operating conditions
- 4.2.1 Operating temperature range
- 4.2.2 Supply/power pins
- 4.2.3 Current consumption
- 4.2.4 LTE RF characteristics
- 4.2.5 3G RF characteristics
- 4.2.6 2G RF characteristics
- 4.2.7 ANT_DET pin
- 4.2.8 PWR_ON pin
- 4.2.9 RESET_N pin
- 4.2.10 SIM pins
- 4.2.11 USB pins
- 4.2.12 HSIC pins
- 4.2.13 DDC (I2C) pins
- 4.2.14 Generic Digital Interfaces pins
- 5 Mechanical specifications
- 6 Qualification and approvals
- 7 Product handling & soldering
- 8 Default settings
- 9 Labeling and ordering information
- Appendix
- A Glossary
- Related documents
- Revision history
- Contact
LARA-R2 series - Data Sheet
UBX-16005783 - R15 Functional description Page 6 of 48
1.3 Block diagram
Cellular
Base-band
processor
Memory
Power Management Unit
26 MHz
32.768 kHz
ANT1
RF
transceiver
ANT2
V_INT (I/O)
V_BCKP (RTC)
VCC (Supply)
SIM
USB
HSIC
Power On
External Reset
PAs
LNA
s
Filters
Filter
s
Duplexer
Filters
PAs
LNA
s
Filter
s
Filter
s
Duplexer
Filters
LNA
s
Filter
s
Filters
LNA
s
FiltersFilter
s
Switch
Switch
DDC(I
2
C)
SDIO
UART
ANT_DET
Host Select
GPIO
Digital audio (I
2
S)
Figure 1: LARA-R2 series block diagram
☞ The LARA-R2 series “02” and “62” product versions (i.e. the LARA-R202-02B, LARA-R203-02B,
LARA-R204-02B, LARA-R211-02B, LARA-R220-62B and LARA-R280-02B) do not support the
following interfaces, which can be left unconnected and should not be driven by external devices:
HSIC interface
SDIO interface
HOST_SELECT pin