Datasheet

LARA-R2 series - Data Sheet
UBX-16005783 - R15 Electrical specifications Page 33 of 48
4.2.13 DDC (I
2
C) pins
DDC (I
2
C) lines (SCL and SDA) are compliant with the I
2
C-bus standard mode specification. See the
I
2
C-Bus Specification [17] for detailed electrical characteristics. The values in Table 25 related to
I
2
C-bus standard mode specifications are for information only.
Parameter
Min
Typical
Max
Unit
Remarks
Internal supply for GDI domain
1.80
V
Digital I/O Interfaces supply (V_INT)
Low-level input
–0.20
0.36
V
High-level input
1.26
2.00
V
Low-level output
0.00
0.35
V
Max value at I
OL
= +1.0 mA
Clock frequency on SCL
100
kHz
Table 25: DDC (I
2
C) pins characteristics
4.2.14 Generic Digital Interfaces pins
Parameter
Min
Typical
Max
Unit
Remarks
Internal supply for GDI domain
1.80
V
Digital I/O Interfaces supply (V_INT)
Low-level input
–0.20
0.36
V
High-level input
1.26
2.00
V
Low-level output
0.00
0.35
V
Max value at I
OL
= +6.0 mA for driver class A
High-level output
1.45
1.80
V
Min value at I
OH
= –6.0 mA for driver class A
Internal pull-up input current
–240
µA
PU class a
–110
µA
PU class b
Internal pull-down input current
240
µA
PD class a
100
µA
PD class b
Input/output leakage current
0.7
µA
0.2V < V
IN
< 2.0V
Table 26: GDI pins characteristics
4.2.14.1 AC characteristics of clock output pin
Parameter
Description
Min
Typical
Max
Unit
Remarks
1/T1
GPIO6 clock output frequency
13
MHz
AT+UMCLK=2
26
MHz
AT+UMCLK=3
Table 27: AC characteristics of GPIO6 clock output pin