Datasheet
Table Of Contents
- Document Information
- Contents
- 1 Functional description
- 2 Interfaces
- 3 Pin definition
- 4 Electrical specifications
- 4.1 Absolute maximum rating
- 4.2 Operating conditions
- 4.2.1 Operating temperature range
- 4.2.2 Supply/power pins
- 4.2.3 Current consumption
- 4.2.4 LTE RF characteristics
- 4.2.5 3G RF characteristics
- 4.2.6 2G RF characteristics
- 4.2.7 ANT_DET pin
- 4.2.8 PWR_ON pin
- 4.2.9 RESET_N pin
- 4.2.10 SIM pins
- 4.2.11 USB pins
- 4.2.12 HSIC pins
- 4.2.13 DDC (I2C) pins
- 4.2.14 Generic Digital Interfaces pins
- 5 Mechanical specifications
- 6 Qualification and approvals
- 7 Product handling & soldering
- 8 Default settings
- 9 Labeling and ordering information
- Appendix
- A Glossary
- Related documents
- Revision history
- Contact
LARA-R2 series - Data Sheet
UBX-16005783 - R15 Pin definition Page 22 of 48
No
Name
Power
domain
I/O
Description
Remarks
34
I2S_WA
GDI
I/O /
I/O
I
2
S word alignment /
GPIO
Configurable as I
2
S word alignment, or as GPIO (see 2.8).
I
2
S not supported by LARA-R204-02B and LARA-R220-62B.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
35
I2S_TXD
GDI
O /
I/O
I
2
S transmit data /
GPIO
Configurable as I
2
S transmit data out, or as GPIO (see 2.8).
I
2
S not supported by LARA-R204-02B and LARA-R220-62B.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
36
I2S_CLK
GDI
I/O /
I/O
I
2
S clock /
GPIO
Configurable as I
2
S clock, or as GPIO (see 2.8).
I
2
S not supported by LARA-R204-02B and LARA-R220-62B.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
37
I2S_RXD
GDI
I /
I/O
I
2
S receive data /
GPIO
Configurable as I
2
S receive data input, or as GPIO (see 2.8).
I
2
S not supported by LARA-R204-02B and LARA-R220-62B.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
38
SIM_CLK
SIM
O
SIM clock
See section 4.2.9 for detailed electrical specs.
39
SIM_IO
SIM
I/O
SIM data
Internal 4.7 k pull-up resistor to VSIM.
See section 4.2.9 for detailed electrical specs.
40
SIM_RST
SIM
O
SIM reset
See section 4.2.9 for detailed electrical specs.
41
VSIM
-
O
SIM supply output
VSIM = 1.80 V typical or 2.90 V typical generated by the
module according to the external SIM card/chip type.
See section 4.2.2 for detailed electrical specs.
42
GPIO5
GDI
I/O
GPIO
Configurable for SIM card detection, or as GPIO (see 2.8).
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
43
GND
-
N/A
Ground
All the GND pins must be connected to ground
44
SDIO_D2
GDI
I/O
SDIO serial data [2]
SDIO not supported by “02” and “62” product versions.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
45
SDIO_CLK
GDI
O
SDIO serial clock
SDIO not supported by “02” and “62” product versions.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
46
SDIO_CMD
GDI
I/O
SDIO command
SDIO not supported by “02” and “62” product versions.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
47
SDIO_D0
GDI
I/O
SDIO serial data [0]
SDIO not supported by “02” and “62” product versions.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
48
SDIO_D3
GDI
I/O
SDIO serial data [3]
SDIO not supported by “02” and “62” product versions.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
49
SDIO_D1
GDI
I/O
SDIO serial data [1]
SDIO not supported by “02” and “62” product versions.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.