Datasheet
Table Of Contents
- Document Information
- Contents
- 1 Functional description
- 2 Interfaces
- 3 Pin definition
- 4 Electrical specifications
- 4.1 Absolute maximum rating
- 4.2 Operating conditions
- 4.2.1 Operating temperature range
- 4.2.2 Supply/power pins
- 4.2.3 Current consumption
- 4.2.4 LTE RF characteristics
- 4.2.5 3G RF characteristics
- 4.2.6 2G RF characteristics
- 4.2.7 ANT_DET pin
- 4.2.8 PWR_ON pin
- 4.2.9 RESET_N pin
- 4.2.10 SIM pins
- 4.2.11 USB pins
- 4.2.12 HSIC pins
- 4.2.13 DDC (I2C) pins
- 4.2.14 Generic Digital Interfaces pins
- 5 Mechanical specifications
- 6 Qualification and approvals
- 7 Product handling & soldering
- 8 Default settings
- 9 Labeling and ordering information
- Appendix
- A Glossary
- Related documents
- Revision history
- Contact
LARA-R2 series - Data Sheet
UBX-16005783 - R15 Pin definition Page 20 of 48
No
Name
Power
domain
I/O
Description
Remarks
1
GND
-
N/A
Ground
All the GND pins must be connected to ground
2
V_BCKP
-
I/O
Real Time Clock supply
input/output
V_BCKP = 1.8 V (typical) generated by the module to supply
the RTC when VCC voltage is within valid operating range.
See section 4.2.2 for detailed electrical specs.
3
GND
-
N/A
Ground
All the GND pins must be connected to ground
4
V_INT
-
O
Generic Digital Interfaces
supply output
V_INT = 1.8 V (typical) generated by the module when it is
switched-on and with the RESET_N pin is not forced low.
See section 4.2.2 for detailed electrical specs.
5
GND
-
N/A
Ground
All the GND pins must be connected to ground
6
DSR
GDI
O
UART data set ready
Circuit 107 (DSR) in ITU-T V.24.
Output driver class A. PU/PD class a.
Value at internal reset: T/PU.
See section 4.2.14 for detailed electrical specs.
7
RI
GDI
O
UART ring indicator
Circuit 125 (RI) in ITU-T V.24.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
8
DCD
GDI
O
UART data carrier detect
Circuit 109 (DCD) in ITU-T V.24.
Output driver class A. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
9
DTR
GDI
I
UART data terminal ready
Circuit 108/2 (DTR) in ITU-T V. 24.
Internal active pull-up to V_INT enabled. PU/PD class a.
Value at internal reset: T/PU.
See section 4.2.14 for detailed electrical specs.
10
RTS
GDI
I
UART ready to send
Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT enabled. PU/PD class a.
Value at internal reset: T/PU.
See section 4.2.14 for detailed electrical specs.
11
CTS
GDI
O
UART clear to send
Circuit 106 (CTS) in ITU-T V.24.
Output driver class A. PU/PD class a.
Value at internal reset: T/PU.
See section 4.2.14 for detailed electrical specs.
12
TXD
GDI
I
UART data input
Circuit 103 (TxD) in ITU-T V.24.
Internal active pull-up to V_INT enabled. PU/PD class a.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
13
RXD
GDI
O
UART data output
Circuit 104 (RxD) in ITU-T V.24.
Output driver class A. PU/PD class a.
Value at internal reset: T/PU.
See section 4.2.14 for detailed electrical specs.
14
GND
-
N/A
Ground
All the GND pins must be connected to ground
15
PWR_ON
POS
I
Power-on input
Internal 10 k pull-up resistor to V_BCKP.
See section 4.2.8 for detailed electrical specs.
16
GPIO1
GDI
I/O
GPIO
GPIO configurable as described in section 2.8.
Output driver class A. PU/PD class b.
Value at internal reset: T/PD.
See section 4.2.14 for detailed electrical specs.
17
VUSB_DET
VBUS
I
VBUS USB detect input
VBUS (5 V typical) USB supply generated by the host must
be connected to this input pin to enable the USB interface.
See section 4.2.11 for detailed electrical specs.
18
RESET_N
ERS
I
External reset input
Internal 10 k pull-up resistor to V_BCKP.
See section 4.2.9 for detailed electrical specs.