Datasheet

LARA-R2 series - Data Sheet
UBX-16005783 - R15 Interfaces Page 14 of 48
2.5 Serial communication
LARA-R2 series modules provide the following serial communication interfaces:
 UART interface: Universal Asynchronous Receiver/Transmitter serial interface available for the
communication with a host application processor (AT commands, data communication, FW
update by means of FOAT), for FW update by means of the u-blox EasyFlash tool and for
diagnostic.
 USB interface: Universal Serial Bus 2.0 compliant interface available for the communication with
a host application processor (AT commands, data communication, FW update by means of the
FOAT feature), for FW update by means of the u-blox EasyFlash tool and for diagnostic.
 HSIC interface: High-Speed Inter-Chip USB compliant interface available for the communication
with a host application processor (AT commands, data communication, FW update by means of
the FOAT feature), for FW update by means of the u-blox EasyFlash tool and for diagnostic.
 DDC interface: I
2
C bus compatible interface available for the communication with u-blox GNSS
positioning chips/modules and with external I
2
C devices as an audio codec.
 SDIO interface: Secure Digital Input Output interface available for the communication with
compatible u-blox short range radio communication Wi-Fi modules.
2.5.1 UART interface
LARA-R2 series modules include a 9-wire unbalanced Universal Asynchronous Receiver/Transmitter
serial interface (UART) for communication with an application host processor (AT commands, data
communication, FW update by means of the FOAT feature), for FW update by means of the u-blox
EasyFlash tool and for diagnostic.
 UART features are:
 Complete serial port with RS-232 functionality conforming to the ITU-T V.24
Recommendation [14], with CMOS compatible signal levels (0 V for low data bit or ON state and
1.8 V for high data bit or OFF state)
 Data lines (RXD as output, TXD as input), hardware flow control lines (CTS as output, RTS as
input), modem status and control lines (DTR as input, DSR as output, DCD as output, RI as output)
are provided
 Hardware flow control (default value), software flow control, or none flow control are supported
 Power saving indication available on the hardware flow control output (CTS line): the line is driven
to the OFF state when the module is not prepared to accept data by the UART interface
 Power saving control over the RTS input or the DSR input can be enabled via AT+UPSV command
(for more details, see u-blox AT Commands Manual [1] and LARA-R2 series System Integration
Manual [2])
 The following baud rates are supported: 9600, 19200, 38400, 57600, 115200 (default baud rate
when autobauding is disabled), 230400, 460800, 921600, 3000000, 3250000, 6000000 and
6500000 bit/s
 One-shot autobauding is supported and it is enabled by default: automatic baud rate detection is
performed only once, at module start up. After the detection, the module works at the fixed baud
rate (the detected one) and the baud rate can only be changed via AT command (see the u-blox AT
Commands Manual [1], +IPR).
 The following frame formats are supported: 8N2, 8N1 (default format when automatic frame
recognition is disabled), 8E1, 8O1, 7E1 and 7O1.
 One-shot automatic frame recognition is supported and it is enabled by default in conjunction with
automatic baud rate detection (autobauding): the detection is performed only once, at module
start up. After the detection, the module works at the detected frame format and it can only be
changed via AT command (see u-blox AT Commands Manual [1], +ICF).