Datasheet

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3. Functional Description
• Off: CHIP_PU pin is low. The RTC is disabled. All registers are cleared.
•
Deep-sleep: Only RTC is powered on—the rest of the chip is powered off. Recovery
memory of RTC can keep basic Wi-Fi connecting information.
• Sleep: Only the RTC is operating. The crystal oscillator is disabled. Any wake-up
events (MAC, host, RTC timer, external interrupts) will put the chip into the wake up
mode.
• Wake up: In this state, the system switches from the sleep states to the PWR mode.
The crystal oscillator and PLLs are enabled.
•
On: The high speed clock is operational and sent to each block enabled by the clock
control register. Lower level clock gating is implemented at the block level, including
the CPU, which can be gated off using the WAITI instruction while the system is on.
Espressif
$ /$12 25
2017.05