Datasheet

VS1053b Datasheet
10 VS1053B REGISTERS
10.12 VS1053b Audio Path
MIC AMP
MUX
Stereo ADC
MICN
MICP
LINE1
LINE2
Sample-Rate
Converter
Audio
FIFO
+
Volume
Control
SDM
SRC
Sigma-Delta
Modulator
Analog
Drivers
ADC
LEFT
RIGHT
CBUF
I2S
Figure 16: VS1053b ADC and DAC data paths
In PCM / IMA ADPCM encoding mode the data from Analog-to-Digital conversion is first pro-
cessed in 48 kHz or 24 kHz samplerate. The firmware performs DC offset removal and gain
control (automatic or fixed), then redirects the data to the audio FIFO. From there the data goes
to the samplerate converter with a delay of only a couple of samples. The samplerate converter
upsamples the data to XTALI/2 (6.144 MHz with the default clock), from where it is resampled
to either 1×, 2×, or 3× the requested samplerate. The additional decimation is performed in
software to get the final data at the right frequency for PCM / IMA ADPCM encoding.
Version: 1.13, 2011-05-27 76