Datasheet

VS1053b Datasheet
7 SPI BUSES
SI line followed by an 8-bit word address.
After the word has been shifted in and the last clock has been sent, XCS should be pulled high
to end the WRITE sequence.
After the last bit has been sent, DREQ is driven low for the duration of the register update,
marked “execution” in the figure. The time varies depending on the register and its contents
(see table in Chapter 8.7 for details). If the maximum time is longer than what it takes from the
microcontroller to feed the next SCI command or SDI byte, status of DREQ must be checked
before finishing the next SCI/SDI operation.
7.5.4 SCI Multiple Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
0 0 0 0 0 0 1 0 0 0 0
3 2 1 0
address
XCS
SCK
SI
15 14
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SO 0 0
0
instruction (write)
DREQ
1 0
X
0 0
X
execution
1
0 15 14
data out 1
data out 2
0 0 0 0
execution
X
31
30
32 3329
d.out n
m−2m−1
Figure 8: SCI Multiple Word Write
VS1053b allows for the user to send multiple words to the same SCI register, which allows fast
SCI uploads, shown in Figure 8. The main difference to a single write is that instead of bringing
XCS up after sending the last bit of a data word, the next data word is sent immediately. After
the last data word, XCS is driven high as with a single word write.
After the last bit of a word has been sent, DREQ is driven low for the duration of the register
update, marked “execution” in the figure. The time varies depending on the register and its
contents (see table in Chapter 8.7 for details). If the maximum time is longer than what it takes
from the microcontroller to feed the next SCI command or SDI byte, status of DREQ must be
checked before finishing the next SCI/SDI operation.
Version: 1.13, 2011-05-27 20