Datasheet

DocID026899 Rev 7 71/99
LSM6DS3 Register description
99
9.57 FIFO_DATA_OUT_H (3Fh)
FIFO data output register (r). For a proper reading of the register, it is recommended to set the BDU bit
in CTRL3_C (12h) to 1.
9.58 TIMESTAMP0_REG (40h)
Time stamp first byte data output register (r). The value is expressed as a 24-bit word and the bit
resolution is defined by setting the value in WAKE_UP_DUR (5Ch).
9.59 TIMESTAMP1_REG (41h)
Time stamp second byte data output register (r). The value is expressed as a 24-bit word and the bit
resolution is defined by setting value in WAKE_UP_DUR (5Ch).
9.60 TIMESTAMP2_REG (42h)
Time stamp third byte data output register (r/w). The value is expressed as a 24-bit word and the bit
resolution is defined by setting the value in WAKE_UP_DUR (5Ch). To reset the timer, the AAh value
has to be stored in this register.
Table 145. FIFO_DATA_OUT_H register
DATA_
OUT_
FIFO_H_7
DATA_
OUT_
FIFO_H_6
DATA_
OUT_
FIFO_H_5
DATA_
OUT_
FIFO_H_4
DATA_
OUT_
FIFO_H_3
DATA_
OUT_
FIFO_H_2
DATA_
OUT_
FIFO_H_1
DATA_
OUT_
FIFO_H_0
Table 146. FIFO_DATA_OUT_H register description
DATA_OUT_FIFO_H_[7:0] FIFO data output (second byte)
Table 147. TIMESTAMP0_REG register
TIMESTA
MP0_7
TIMESTA
MP0_6
TIMESTA
MP0_5
TIMESTA
MP0_4
TIMESTA
MP0_3
TIMESTA
MP0_2
TIMESTA
MP0_1
TIMESTA
MP0_0
Table 148. TIMESTAMP0_REG register description
TIMESTAMP0_[7:0] TIMESTAMP first byte data output
Table 149. TIMESTAMP1_REG register
TIMESTA
MP1_7
TIMESTA
MP1_6
TIMESTA
MP1_5
TIMESTA
MP1_4
TIMESTA
MP1_3
TIMESTA
MP1_2
TIMESTA
MP1_1
TIMESTA
MP1_0
Table 150. TIMESTAMP1_REG register description
TIMESTAMP1_[7:0] TIMESTAMP second byte data output
Table 151. TIMESTAMP2_REG register
TIMESTA
MP2_7
TIMESTA
MP2_6
TIMESTA
MP2_5
TIMESTA
MP2_4
TIMESTA
MP2_3
TIMESTA
MP2_2
TIMESTA
MP2_1
TIMESTA
MP2_0
Table 152. TIMESTAMP2_REG register description
TIMESTAMP2_[7:0] TIMESTAMP third byte data output