Datasheet
DocID026899 Rev 7 55/99
LSM6DS3 Register description
99
9.15 CTRL4_C (13h)
Control register 4 (r/w).
9.16 CTRL5_C (14h)
Control register 5 (r/w).
Table 56. CTRL5_C register
Table 54. CTRL4_C register
XL_BW_
SCAL_ODR
SLEEP_G
INT2_on_
INT1
FIFO_
TEMP_EN
DRDY_
MASK
I2C_disable
MODE3_
EN
STOP_ON
_FTH
Table 55. CTRL4_C register description
XL_BW_
SCAL_ODR
Accelerometer bandwidth selection. Default value: 0
(0
(1)
: bandwidth determined by ODR selection, refer to Table 48;
1
(2)
: bandwidth determined by setting BW_XL[1:0] in CTRL1_XL (10h) register.)
1. Filter used in high-performance mode only with ODR less than 3.33 kHz.
2. Filter used in high-performance mode only.
SLEEP_G Gyroscope sleep mode enable. Default value: 0
(0: disabled; 1: enabled)
INT2_on_INT1 All interrupt signals available on INT1 pad enable. Default value: 0
(0: interrupt signals divided between INT1 and INT2 pads;
1: all interrupt signals in logic or on INT1 pad)
FIFO_TEMP_EN Enable temperature data as 4
th
FIFO data set
(3)
. Default: 0
(0: disable temperature data as 4
th
FIFO data set;
1: enable temperature data as 4
th
FIFO data set)
3. This bit is effective if the TIMER_PEDO_FIFO_EN bit of FIFO_CTRL2 register is set to 0.
DRDY_MASK Configuration 1
(4)
data available enable bit. Default value: 0
(0: DA timer disabled; 1: DA timer enabled)
4. In configuration 1, switching to combo mode, data are collected in FIFO only when both accelerometer and
gyroscope are set. Switching to accelerometer only, data are collected in FIFO after filter setting.
I2C_disable Disable I
2
C interface. Default value: 0
(0: both I
2
C and SPI enabled; 1: I
2
C disabled, SPI only)
MODE3_EN Enable auxiliary SPI interface (Mode 3, refer to Table 2). Default value: 0
(0: auxiliary SPI disabled; 1: auxiliary SPI enabled
(5)
)
5. Conditioned pads are: SDx, SCx, OCS
STOP_ON_FTH Enable FIFO threshold level use. Default value: 0.
(0: FIFO depth is not limited; 1: FIFO depth is limited to threshold level)
ROUNDING2 ROUNDING1 ROUNDING0 0
(1)
1. This bit must be set to ‘0’ for the correct operation of the device
ST1_G ST0_G ST1_XL ST0_XL