Datasheet

ManualsBrandsSEEED STUDIO ManualsC-ControlAcceleration sensor Grove, I²C Compatible with: Grove

This is information on a product in full production.

October 2015 DocID026899 Rev 7 1/99

LSM6DS3

iNEMO inertial module:

always-on 3D accelerometer and 3D gyroscope

Datasheet - production data

Features

 Power consumption: 0.9 mA in combo normal mode

and 1.25 mA in combo high-performance mode up to

1.6 kHz.

 “Always-on” experience with low power

consumption for both accelerometer and gyroscope

 Smart FIFO up to 8 kbyte based on features set

 Compliant with Android K and L

 Hard, soft ironing for external magnetic sensor

corrections

 ±2/±4/±8/±16 g full scale

 ±125/±245/±500/±1000/±2000 dps full scale

 Analog supply voltage: 1.71 V to 3.6 V

 Independent IOs supply (1.62 V)

 Compact footprint, 2.5 mm x 3 mm x 0.83 mm

 SPI/I

C serial interface with main processor data

synchronization feature

 Embedded temperature sensor

 ECOPACK

, RoHS and “Green” compliant

Applications

 Pedometer, step detector and step counter

 Significant motion and tilt functions

 Indoor navigation

 Tap and double-tap detection

 IoT and connected devices

 Intelligent power saving for handheld devices

 Vibration monitoring and compensation

 Free-fall detection

 6D orientation detection

Description

The LSM6DS3 is a system-in-package featuring a 3D

digital accelerometer and a 3D digital gyroscope

performing at 1.25 mA (up to 1.6 kHz ODR) in high-

performance mode and enabling always-on low-power

features for an optimal motion experience for the

consumer.

The LSM6DS3 supports main OS requirements,

offering real, virtual and batch sensors with 8 kbyte for

dynamic data batching.

ST’s family of MEMS sensor modules leverages the

robust and mature manufacturing processes already

used for the production of micromachined

accelerometers and gyroscopes.

The various sensing elements are manufactured using

specialized micromachining processes, while the IC

interfaces are developed using CMOS technology that

allows the design of a dedicated circuit which is

trimmed to better match the characteristics of the

sensing element.

The LSM6DS3 has a full-scale acceleration range of

±2/±4/±8/±16 g and an angular rate range of

±125/±245/±500/±1000/±2000 dps.

High robustness to mechanical shock makes the

LSM6DS3 the preferred choice of system designers for

the creation and manufacturing of reliable products.

The LSM6DS3 is available in a plastic land grid array

(LGA) package.

LGA-14L (2.5 x 3 x 0.83 mm) typ.

Table 1. Device summary

Part number

Temperature

range [°C]

Package Packing

LSM6DS3 -40 to +85

LGA-14L

(2.5 x 3 x 0.83 mm)

Tray

LSM6DS3TR -40 to +85

Tape &

Reel

www.st.com

Summary of content (99 pages)

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LSM6DS3 iNEMO inertial module: always-on 3D accelerometer and 3D gyroscope Datasheet - production data Description LGA-14L (2.5 x 3 x 0.83 mm) typ. The LSM6DS3 is a system-in-package featuring a 3D digital accelerometer and a 3D digital gyroscope performing at 1.25 mA (up to 1.6 kHz ODR) in highperformance mode and enabling always-on low-power features for an optimal motion experience for the consumer.
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Contents LSM6DS3 Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2 Embedded low-power features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1 Tilt detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4 Module specifications . . . . . . . . . .
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LSM6DS3 Contents 6.1 I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 6.1.1 6.2 7 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6.2.1 SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6.2.2 SPI write . . . . . . . .
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Contents 4/99 LSM6DS3 9.20 CTRL9_XL (18h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 9.21 CTRL10_C (19h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 9.22 MASTER_CONFIG (1Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 9.23 WAKE_UP_SRC (1Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 9.24 TAP_SRC (1Ch) . . . . . . . . . . . . . . . . . .
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LSM6DS3 Contents 9.53 FIFO_STATUS2 (3Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 9.54 FIFO_STATUS3 (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 9.55 FIFO_STATUS4 (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 9.56 FIFO_DATA_OUT_L (3Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 9.57 FIFO_DATA_OUT_H (3Fh) . . . . . . . . . . . . . . . . . . . .
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Contents LSM6DS3 10 Embedded functions register mapping . . . . . . . . . . . . . . . . . . . . . . . . . 81 11 Embedded functions registers description . . . . . . . . . . . . . . . . . . . . . 83 11.1 SLV0_ADD (02h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 11.2 SLV0_SUBADD (03h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 11.3 SLAVE0_CONFIG (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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LSM6DS3 Contents 11.31 MAG_OFFZ_L (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 11.32 MAG_OFFZ_H (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 12 Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 13 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 14 13.1 LGA-14 package information . . . . . . . . . . . . . .
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List of tables LSM6DS3 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48.
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LSM6DS3 List of tables Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. Table 88. Table 89. Table 90. Table 91. Table 92. Table 93. Table 94. Table 95. Table 96.
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List of tables Table 101. Table 102. Table 103. Table 104. Table 105. Table 106. Table 107. Table 108. Table 109. Table 110. Table 111. Table 112. Table 113. Table 114. Table 115. Table 116. Table 117. Table 118. Table 119. Table 120. Table 121. Table 122. Table 123. Table 124. Table 125. Table 126. Table 127. Table 128. Table 129. Table 130. Table 131. Table 132. Table 133. Table 134. Table 135. Table 136. Table 137. Table 138. Table 139. Table 140. Table 141. Table 142. Table 143. Table 144. Table 145.
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LSM6DS3 List of tables Table 153. Table 154. Table 155. Table 156. Table 157. Table 158. Table 159. Table 160. Table 161. Table 162. Table 163. Table 164. Table 165. Table 166. Table 167. Table 168. Table 169. Table 170. Table 171. Table 172. Table 173. Table 174. Table 175. Table 176. Table 177. Table 178. Table 179. Table 180. Table 181. Table 182. Table 183. Table 184. Table 185. Table 186. Table 187. Table 188. Table 189. Table 190. Table 191. Table 192. Table 193. Table 194. Table 195. Table 196.
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List of tables Table 205. Table 206. Table 207. Table 208. Table 209. Table 210. Table 211. Table 212. Table 213. Table 214. Table 215. Table 216. Table 217. Table 218. Table 219. Table 220. Table 221. Table 222. Table 223. Table 224. Table 225. Table 226. Table 227. Table 228. Table 229. Table 230. Table 231. Table 232. Table 233. Table 234. Table 235. Table 236. Table 237. Table 238. Table 239. Table 240. Table 241. Table 242. Table 243. Table 244. Table 245. Table 246. Table 247. Table 248. Table 249.
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LSM6DS3 List of tables Table 257. Table 258. Table 259. Table 260. Table 261. Table 262. Table 263. Table 264. Table 265. Table 266. Table 267. Table 268. Table 269. Table 270. Table 271. MAG_SI_ZZ register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 MAG_OFFX_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 MAG_OFFX_L register description. . . . . . . . . . . . . . . . . . . .
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List of figures LSM6DS3 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. 14/99 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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LSM6DS3 1 Overview Overview The LSM6DS3 is a system-in-package featuring a high-performance 3-axis digital accelerometer and 3-axis digital gyroscope. The integrated power-efficient modes are able to reduce the power consumption down to 1.25 mA in high-performance mode, combining always-on low-power features with superior sensing precision for an optimal motion experience for the consumer thanks to ultra-low noise performance for both the gyroscope and accelerometer.
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Embedded low-power features 2 LSM6DS3 Embedded low-power features The LSM6DS3 has been designed to be fully compliant with Android, featuring the following on-chip functions:  8 kbyte data buffering – 100% efficiency with flexible configurations and partitioning – possibility to store time stamp  Event-detection interrupts (fully configurable): – free-fall – wakeup – 6D orientation – tap and double-tap sensing – activity / inactivity recognition  Specific IP blocks with negligible power consumption an
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LSM6DS3 3 Pin description Pin description Figure 1. Pin connections Z X +Ω Y Z X +Ω X (TOP VIEW) DIRECTIONS OF THE DETECTABLE ANGULAR RATES 11 12 14 BOTTOM VIEW 1 4 8 7 SDO/SA0 SDx SCx INT1 5 VDDIO +Ω NC OCS INT2 VDD SCL SDA DIRECTION OF THE DETECTABLE ACCELERATIONS CS (TOP VIEW) GND GND Y LSM6DS3 offers the flexibility to connect the pins in order to have three different mode connections and functionalities.
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Pin description LSM6DS3 Table 2.
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LSM6DS3 Module specifications 4 Module specifications 4.1 Mechanical characteristics @ Vdd = 1.8 V, T = 25 °C unless otherwise noted. Table 3. Mechanical characteristics Symbol Parameter Test conditions Min. Typ.(1) Max. Unit ±2 LA_FS ±4 Linear acceleration measurement range ±8 g ±16 ±125 G_FS ±245 Angular rate measurement range ±500 dps ±1000 ±2000 LA_So G_So Linear acceleration sensitivity Angular rate sensitivity FS = ±2 0.061 FS = ±4 0.122 FS = ±8 0.244 FS = ±16 0.
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Module specifications LSM6DS3 Table 3. Mechanical characteristics (continued) Symbol LA_ODR Parameter Test conditions Angular rate output data rate Top Operating temperature range Typ.(1) Max. 13 26 52 104 208 416 833 1666 3332 6664 Linear acceleration output data rate G_ODR Unit Hz 13 26 52 104 208 416 833 1666 -40 1. Typical specifications are not guaranteed. 2. Measurements are performed in a uniform temperature setup. 3. Values after soldering. 20/99 Min.
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LSM6DS3 4.2 Module specifications Electrical characteristics @ Vdd = 1.8 V, T = 25 °C unless otherwise noted. Table 4. Electrical characteristics Symbol Vdd Vdd_IO Min. Typ.(1) Max. Unit Supply voltage 1.71 1.8 3.6 V Power supply for I/O 1.62 Vdd + 0.1 V Parameter Test conditions IddHP Gyroscope and accelerometer up to ODR = 1.6 kHz in high-performance mode 1.25 mA IddNM Gyroscope and accelerometer ODR = 208 Hz in normal mode 0.
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Module specifications 4.3 LSM6DS3 Temperature sensor characteristics @ Vdd = 1.8 V, T = 25 °C unless otherwise noted. Table 5. Temperature sensor characteristics Symbol TODR Toff Parameter Test condition Min. Temperature refresh rate Temperature offset (2) TSen Temperature sensitivity TST Temperature stabilization time(3) Operating temperature range 1. Typical specifications are not guaranteed. 2. The output of the temperature sensor is 0 LSB (typ.) at 25 °C. 3.
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LSM6DS3 Module specifications 4.4 Communication interface characteristics 4.4.1 SPI - serial peripheral interface Subject to general operating conditions for Vdd and Top. Table 6.
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Module specifications LSM6DS3 I2C - inter-IC control interface 4.4.2 Subject to general operating conditions for Vdd and Top. Table 7. I2C slave timing values Symbol f(SCL) I2C Standard mode(1) Parameter SCL clock frequency I2C Fast mode (1) Min Max Min Max 0 100 0 400 tw(SCLL) SCL clock low time 4.7 1.3 tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 th(SDA) SDA data hold time 0 th(ST) START condition hold time 4 0.
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LSM6DS3 4.5 Module specifications Absolute maximum ratings Stresses above those listed as “Absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 8. Absolute maximum ratings Symbol Maximum value Unit Vdd Supply voltage -0.3 to 4.
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Module specifications 4.6 Terminology 4.6.1 Sensitivity LSM6DS3 Linear acceleration sensitivity can be determined, for example, by applying 1 g acceleration to the device. Because the sensor can measure DC accelerations, this can be done easily by pointing the selected axis towards the ground, noting the output value, rotating the sensor 180 degrees (pointing towards the sky) and noting the output value again. By doing so, ±1 g acceleration is applied to the sensor.
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LSM6DS3 Functionality 5 Functionality 5.1 Operating modes The LSM6DS3 has three operating modes available:  only accelerometer active and gyroscope in power-down  only gyroscope active and accelerometer in power-down  both accelerometer and gyroscope sensors active with independent ODR The accelerometer is activated from power down by writing ODR_XL[3:0] in CTRL1_XL (10h) while the gyroscope is activated from power-down by writing ODR_G[3:0] in CTRL2_G (11h).
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Functionality LSM6DS3 Writing data in the FIFO can be configured to be triggered by the: - accelerometer/gyroscope data-ready signal; in which case the ODR must be lower than or equal to both the accelerometer and gyroscope ODRs; - sensor hub data-ready signal; - step detection signal. In addition, each data can be stored at a decimated data rate compared to FIFO ODR and it is configurable by the user, setting the registers FIFO_CTRL3 (08h) and FIFO_CTRL4 (09h).
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LSM6DS3 5.4.3 Functionality Continuous mode Continuous mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 110) provides a continuous FIFO update: as new data arrives, the older data is discarded. A FIFO threshold flag FIFO_STATUS2 (3Bh)(FTH) is asserted when the number of unread samples in FIFO is greater than or equal to FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h)(FTH [11:0]).
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Functionality LSM6DS3 The 3rd FIFO data set is reserved for the external sensor data stored in the registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h); The 4th FIFO data set can be alternately associated to the external sensor data stored in the registers from SENSORHUB7_REG (34h) to SENSORHUB12_REG(39h), to the step counter and time stamp info, or to the temperature sensor data. 5.4.7 Filter block diagrams Figure 4.
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LSM6DS3 Functionality Figure 6.
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Digital interfaces 6 LSM6DS3 Digital interfaces The registers embedded inside the LSM6DS3 may be accessed through both the I2C and SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire interface mode. The serial interfaces are mapped onto the same pins. To select/exploit the I2C interface, the CS line must be tied high (i.e connected to Vdd_IO). Table 9. Serial interface pin description Pin name CS SCL/SPC SDA/SDI/SDO SDO/SA0 6.
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LSM6DS3 6.1.1 Digital interfaces I2C operation The transaction on the bus is started through a START (ST) signal. A START condition is defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After this has been transmitted by the master, the bus is considered busy.
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Digital interfaces LSM6DS3 Table 14. Transfer when master is receiving (reading) one byte of data from slave Master ST SAD + W Slave SUB SAK SR SAD + R SAK NMAK SAK SP DATA Table 15. Transfer when master is receiving (reading) multiple bytes of data from slave Master Slave ST SAD+W SUB SAK SR SAD+R SAK MAK SAK DATA MAK DAT A NMAK SP DATA Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number of bytes transferred per transfer is unlimited.
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LSM6DS3 Digital interfaces Both the read register and write register commands are completed in 16 clock pulses or in multiples of 8 in case of multiple read/write bytes. Bit duration is the time between two falling edges of SPC. The first bit (bit 0) starts at the first falling edge of SPC after the falling edge of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SPC just before the rising edge of CS. bit 0: RW bit. When 0, the data DI(7:0) is written into the device.
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Digital interfaces LSM6DS3 Figure 9. Multiple byte SPI read protocol (2-byte example) &6 63& 6', 5: $' $' $' $' $' $' $' 6'2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 6.2.2 SPI write Figure 10. SPI write protocol &6 63& 6', ', ', ', ', ', ', ', ', 5: $' $' $' $' $' $' $' The SPI Write command is performed with 16 clock pulses. A multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: WRITE bit.
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LSM6DS3 6.2.3 Digital interfaces SPI read in 3-wire mode A 3-wire mode is entered by setting the CTRL3_C (12h) (SIM) bit equal to ‘1’ (SPI serial interface mode selection). Figure 12. SPI read protocol in 3-wire mode &6 63& 6', 2 '2 '2 '2 '2 '2 '2 '2 '2 5: $' $' $' $' $' $' $' The SPI read command is performed with 16 clock pulses: bit 0: READ bit. The value is 1. bit 1-7: address AD(6:0). This is the address field of the indexed register. bit 8-15: data DO(7:0) (read mode).
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Application hints LSM6DS3 7 Application hints 7.1 LSM6DS3 electrical connections in Mode 1 Figure 13. LSM6DS3 electrical connections in Mode 1 6'2 6$ *1' RU 9'',2 &6 6&/ 6'$ 723 9,(: 6'[ 6&[ 1& ,17 9GG ,17 9'' *1' *1' 9'',2 & 1& & Q) *1' 9GGB,2 Q) *1' The device core is supplied through the Vdd line.
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LSM6DS3 7.2 Application hints LSM6DS3 electrical connections in Mode 2 Figure 14. LSM6DS3 electrical connections in Mode 2 &6 6&/ 6'$ 6'2 6$ 723 9,(: 06'$ 06&/ 1& ,17 1& 0'5'< ,17 9GG 9'' & *1' *1' 9'',2 & Q) *1' 9GGB,2 Q) *1' The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic) should be placed as near as possible to the supply pin of the device (common design practice).
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Application hints 7.3 LSM6DS3 LSM6DS3 electrical connections in Mode 3 Figure 15. LSM6DS3 electrical connections in Mode 3 1& 6&/ 6'$ 6$ 6', 6'2 63& ,17 723 9,(: 2&6 9GG ,17 9'' *1' *1' 9'',2 & 1& & Q) *1' 9GGB,2 Q) *1' The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic) should be placed as near as possible to the supply pin of the device (common design practice).
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LSM6DS3 8 Register mapping Register mapping The table given below provides a list of the 8/16 bit registers embedded in the device and the corresponding addresses. Table 16.
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Register mapping LSM6DS3 Table 16.
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LSM6DS3 Register mapping Table 16.
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Register mapping LSM6DS3 Table 16.
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LSM6DS3 9 Register description Register description The device contains a set of registers which are used to control its behavior and to retrieve linear acceleration, angular rate and temperature data. The register addresses, made up of 7 bits, are used to identify them and to write the data through the serial interface. 9.1 FUNC_CFG_ACCESS (01h) Enable embedded functions register (r/w). Table 17. FUNC_CFG_ACCESS register FUNC_CFG_EN 0 (1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 1.
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Register description 9.4 LSM6DS3 FIFO_CTRL2 (07h) FIFO control register (r/w). Table 23. FIFO_CTRL2 register TIMER_PEDO TIMER_PEDO _FIFO_EN _FIFO_DRDY 0(1) 0(1) FTH_11 FTH10 FTH_9 FTH_8 1. This bit must be set to ‘0’ for the correct operation of the device. Table 24. FIFO_CTRL2 register description TIMER_PEDO _FIFO_EN Enable pedometer step counter and time stamp as 4th FIFO data set.
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LSM6DS3 Register description Table 27. Gyro FIFO decimation setting DEC_FIFO_GYRO [2:0] Configuration 000 Gyro sensor not in FIFO 001 No decimation 010 Decimation with factor 2 011 Decimation with factor 3 100 Decimation with factor 4 101 Decimation with factor 8 110 Decimation with factor 16 111 Decimation with factor 32 Table 28. Accelerometer FIFO decimation setting DEC_FIFO_XL [2:0] 9.
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Register description LSM6DS3 Table 31. Fourth FIFO data set decimation setting DEC_DS4_FIFO[2:0] Configuration 000 Fourth FIFO data set not in FIFO 001 No decimation 010 Decimation with factor 2 011 Decimation with factor 3 100 Decimation with factor 4 101 Decimation with factor 8 110 Decimation with factor 16 111 Decimation with factor 32 Table 32. Third FIFO data set decimation setting DEC_DS3_FIFO[2:0] 9.
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LSM6DS3 Register description Table 35. FIFO ODR selection Configuration(1) ODR_FIFO_[3:0] 0000 FIFO disabled 0001 FIFO ODR is set to 13 Hz 0010 FIFO ODR is set to 26 Hz 0011 FIFO ODR is set to 52 Hz 0100 FIFO ODR is set to 104 Hz 0101 FIFO ODR is set to 208 Hz 0110 FIFO ODR is set to 416 Hz 0111 FIFO ODR is set to 833 Hz 1000 FIFO ODR is set to 1.66 kHz 1001 FIFO ODR is set to 3.33 kHz 1010 FIFO ODR is set to 6.66 kHz 1.
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Register description LSM6DS3 Table 38. ORIENT_CFG_G register description SignX_G Pitch axis (X) angular rate sign. Default value: 0 (0: positive sign; 1: negative sign) SignY_G Roll axis (Y) angular rate sign. Default value: 0 (0: positive sign; 1: negative sign) SignZ_G Yaw axis (Z) angular rate sign. Default value: 0 (0: positive sign; 1: negative sign) Orient [2:0] Directional user-orientation selection. Default value: 000 For the configuration setting, refer to Table 39. Table 39.
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LSM6DS3 9.10 Register description INT2_CTRL (0Eh) INT2 pad control register (r/w). Each bit in this register enables a signal to be carried through INT2. The pad’s output will supply the OR combination of the selected signals. Table 42. INT2_CTRL register INT2_STEP INT2_STEP_ INT2_ INT2_ _DELTA COUNT_OV FULL_FLAG FIFO_OVR INT2_ FTH INT2_ DRDY _TEMP INT2_ DRDY_G INT2_ DRDY_XL Table 43.
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Register description LSM6DS3 Table 46. CTRL1_XL register description ODR_XL [3:0] Output data rate and power mode selection. Default value: 0000 (see Table 47). FS_XL [1:0] Accelerometer full-scale selection. Default value: 00. (00: ±2 g; 01: ±16 g; 10: ±4 g; 11: ±8 g) BW_XL [1:0] Anti-aliasing filter bandwidth selection. Default value: 00 (00: 400 Hz; 01: 200 Hz; 10: 100 Hz; 11: 50 Hz) Table 47.
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LSM6DS3 9.13 Register description CTRL2_G (11h) Angular rate sensor control register 2 (r/w). Table 49. CTRL2_G register ODR_G3 ODR_G2 ODR_G1 ODR_G0 FS_G1 FS_G0 FS_125 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. Table 50. CTRL2_G register description ODR_G [3:0] Gyroscope output data rate selection. Default value: 0000 (Refer toTable 49) FS_G [1:0] Gyroscope full-scale selection.
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Register description 9.14 LSM6DS3 CTRL3_C (12h) Control register 3 (r/w). Table 52. CTRL3_C register BOOT BDU H_LACTIVE PP_OD SIM IF_INC BLE SW_RESET Table 53. CTRL3_C register description BOOT Reboot memory content. Default value: 0 (0: normal mode; 1: reboot memory content(1)) BDU Block Data Update. Default value: 0 (0: continuous update; 1: output registers not updated until MSB and LSB have been read) H_LACTIVE Interrupt activation level.
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LSM6DS3 9.15 Register description CTRL4_C (13h) Control register 4 (r/w). Table 54. CTRL4_C register XL_BW_ INT2_on_ FIFO_ SLEEP_G SCAL_ODR INT1 TEMP_EN DRDY_ MASK I2C_disable MODE3_ STOP_ON EN _FTH Table 55. CTRL4_C register description XL_BW_ SCAL_ODR Accelerometer bandwidth selection. Default value: 0 (0(1): bandwidth determined by ODR selection, refer to Table 48; 1(2): bandwidth determined by setting BW_XL[1:0] in CTRL1_XL (10h) register.) SLEEP_G Gyroscope sleep mode enable.
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Register description LSM6DS3 Table 57. CTRL5_C register description ROUNDING[2:0] Circular burst-mode (rounding) read from output registers. Default: 000 (000: no rounding; Others: refer to Table 58) ST_G [1:0] Angular rate sensor self-test enable. Default value: 00 (00: Self-test disabled; Other: refer to Table 59) ST_XL [1:0] Linear acceleration sensor self-test enable. Default value: 00 (00: Self-test disabled; Other: refer to Table 60) Table 58.
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LSM6DS3 9.17 Register description CTRL6_C (15h) Angular rate sensor control register 6 (r/w). Table 61. CTRL6_C register TRIG_EN LVLen LVL2_EN XL_HM_MODE 0(1) 0(1) 0(1) 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. Table 62. CTRL6_C register description TRIG_EN Gyroscope data edge-sensitive trigger enable. Default value: 0 (0: external trigger disabled; 1: external trigger enabled) LVLen Gyroscope data level-sensitive trigger enable.
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Register description LSM6DS3 Table 65. Gyroscope high-pass filter mode configuration HPCF_G1 9.19 HPCF_G0 High-pass filter cutoff frequency 0 0 0.0081 Hz 0 1 0.0324 Hz 1 0 2.07 Hz 1 1 16.32 Hz CTRL8_XL (17h) Linear acceleration sensor control register 8 (r/w). Table 66. CTRL8_XL register LPF2_XL_ EN HPCF_ XL1 HPCF_ XL0 0(1) 0(1) HP_SLOPE_X L_EN 0(1) LOW_PASS _ON_6D 1. This bit must be set to ‘0’ for the correct operation of the device. Table 67.
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LSM6DS3 9.20 Register description CTRL9_XL (18h) Linear acceleration sensor control register 9 (r/w). Table 70. CTRL9_XL register (1) 0 (1 0 Zen_XL Yen_XL Xen_XL SOFT_EN 0(1) 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. Table 71. CTRL9_XL register description Zen_XL Accelerometer Z-axis output enable. Default value: 1 (0: Z-axis output disabled; 1: Z-axis output enabled) Yen_XL Accelerometer Y-axis output enable.
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Register description 9.22 LSM6DS3 MASTER_CONFIG (1Ah) Master configuration register (r/w). Table 74. MASTER_CONFIG register DRDY_ON DATA_VALID _INT1 _SEL_FIFO 0(1) START_ CONFIG PULL_UP _EN PASS_ THROUGH _MODE IRON_EN MASTER_ ON 1. This bit must be set to ‘0’ for the correct operation of the device. Table 75. MASTER_CONFIG register description DRDY_ON_ INT1 Manage the Master DRDY signal on INT1 pad.
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LSM6DS3 Register description Table 77. WAKE_UP_SRC register description 9.24 FF_IA Free-fall event detection status. Default: 0 (0: free-fall event not detected; 1: free-fall event detected) SLEEP_ STATE_IA Sleep event status. Default value: 0 (0: sleep event not detected; 1: sleep event detected) WU_IA Wakeup event detection status. Default value: 0 (0: wakeup event not detected; 1: wakeup event detected.) X_WU Wakeup event detection status on X-axis.
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Register description 9.25 LSM6DS3 D6D_SRC (1Dh) Portrait, landscape, face-up and face-down source register (r) Table 80. D6D_SRC register (1) 0 D6D_IA ZH ZL YH YL XH XL 1. This bit must be set to ‘0’ for the correct operation of the device. Table 81. D6D_SRC register description 9.26 D6D_ IA Interrupt active for change position portrait, landscape, face-up, face-down. Default value: 0 (0: change position not detected; 1: change position detected) ZH Z-axis high event (over threshold).
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LSM6DS3 9.27 Register description OUT_TEMP_L (20h), OUT_TEMP(21h) Temperature data output register (r). L and H registers together express a 16-bit word in two’s complement (r). Table 84. OUT_TEMP_L register Temp7 Temp6 Temp5 Temp4 Temp3 Temp2 Temp1 Temp0 Temp9 Temp8 Table 85. OUT_TEMP_H register Temp15 Temp14 Temp13 Temp12 Temp11 Temp10 Table 86. OUT_TEMP register description Temp[15:0] 9.
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Register description 9.31 LSM6DS3 OUTY_H_G (25h) Angular rate sensor roll axis (Y) angular rate output register (r). The value is expressed as a 16-bit word in two’s complement. (r). Table 93. OUTY_H_G register D15 D14 D13 D12 D11 D10 D9 D8 Table 94. OUTY_H_G register description D[15:8] 9.32 Roll axis (Y) angular rate value (MSbyte) OUTZ_L_G (26h) Angular rate sensor yaw axis (Z) angular rate output register (r). The value is expressed as a 16-bit word in two’s complement. (r). Table 95.
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LSM6DS3 9.35 Register description OUTX_H_XL (29h) Linear acceleration sensor X-axis output register (r). The value is expressed as a 16-bit word in two’s complement. Table 101. OUTX_H_XL register D15 D14 D13 D12 D11 D10 D9 D8 Table 102. OUTX_H_XL register description D[15:8] 9.36 X-axis linear acceleration value (MSbyte) OUTY_L_XL (2Ah) Linear acceleration sensor Y-axis output register (r). The value is expressed as a 16-bit word in two’s complement. Table 103.
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Register description 9.39 LSM6DS3 OUTZ_H_XL (2Dh) Linear acceleration sensor Z-axis output register (r). The value is expressed as a 16-bit word in two’s complement. Table 109. OUTZ_H_XL register D15 D14 D13 D12 D11 D10 D9 D8 Table 110. OUTZ_H_XL register description D[15:8] 9.40 Z-axis linear acceleration value (MSbyte) SENSORHUB1_REG (2Eh) First byte associated to external sensors.
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LSM6DS3 9.43 Register description SENSORHUB4_REG (31h) Fourth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 117. SENSORHUB4_REG register SHub4_7 SHub4_6 SHub4_5 SHub4_4 SHub4_3 SHub4_2 SHub4_1 SHub4_0 Table 118. SENSORHUB4_REG register description SHub4_[7:0] 9.
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Register description 9.47 LSM6DS3 SENSORHUB8_REG(35h) Eighth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 125. SENSORHUB8_REG register SHub8_7 SHub8_6 SHub8_5 SHub8_4 SHub8_3 SHub8_2 SHub8_1 SHub8_0 Table 126. SENSORHUB8_REG register description SHub8_[7:0] Eighth byte associated to external sensors 9.
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LSM6DS3 9.51 Register description SENSORHUB12_REG(39h) Twelfth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 133. SENSORHUB12_REG register SHub12_7 SHub12_6 SHub12_5 SHub12_4 SHub12_3 SHub12_2 SHub12_1 SHub12_0 Table 134. SENSORHUB12_REG register description SHub12[7:0] 9.
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Register description 9.54 LSM6DS3 FIFO_STATUS3 (3Ch) FIFO status control register (r). For a proper reading of the register, it is recommended to set the BDU bit in CTRL3_C (12h) to 1. Table 139. FIFO_STATUS3 register FIFO_ PATTERN _7 FIFO_ PATTERN _6 FIFO_ PATTERN _5 FIFO_ PATTERN _4 FIFO_ PATTERN _3 FIFO_ PATTERN _2 FIFO_ PATTERN _1 FIFO_ PATTERN _0 Table 140. FIFO_STATUS3 register description FIFO_ PATTERN_[7:0] 9.55 Word of recursive pattern read at the next reading.
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LSM6DS3 9.57 Register description FIFO_DATA_OUT_H (3Fh) FIFO data output register (r). For a proper reading of the register, it is recommended to set the BDU bit in CTRL3_C (12h) to 1. Table 145. FIFO_DATA_OUT_H register DATA_ DATA_ DATA_ DATA_ DATA_ DATA_ DATA_ DATA_ OUT_ OUT_ OUT_ OUT_ OUT_ OUT_ OUT_ OUT_ FIFO_H_7 FIFO_H_6 FIFO_H_5 FIFO_H_4 FIFO_H_3 FIFO_H_2 FIFO_H_1 FIFO_H_0 Table 146. FIFO_DATA_OUT_H register description DATA_OUT_FIFO_H_[7:0] 9.
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Register description 9.61 LSM6DS3 STEP_TIMESTAMP_L (49h) Step counter timestamp information register (r). When a step is detected, the value of TIMESTAMP_REG1 register is copied in STEP_TIMESTAMP_L. Table 153. STEP_TIMESTAMP_L register STEP_ TIMESTA MP_L_7 STEP_ TIMESTA MP_L_6 STEP_ TIMESTA MP_L_5 STEP_ TIMESTA MP_L_4 STEP_ TIMESTA MP_L_3 STEP_ TIMESTA MP_L_2 STEP_ TIMESTA MP_L_1 STEP_ TIMESTA MP_L_0 Table 154. STEP_TIMESTAMP_L register description STEP_TIMESTAMP_L[7:0] 9.
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LSM6DS3 9.65 Register description SENSORHUB13_REG (4Dh) Thirteenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 161. SENSORHUB13_REG register SHub13_7 SHub13_6 SHub13_5 SHub13_4 SHub13_3 SHub13_2 SHub13_1 SHub13_0 Table 162. SENSORHUB13_REG register description SHub13_[7:0] 9.
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Register description 9.69 LSM6DS3 SENSORHUB17_REG (51h) Seventeenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 169. SENSORHUB17_REG register SHub17_7 SHub17_6 SHub17_5 SHub17_4 SHub17_3 SHub17_2 SHub17_1 SHub17_0 Table 170. SENSORHUB17_REG register description SHub17_[7:0] 9.
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LSM6DS3 9.72 Register description TAP_CFG (58h) Time stamp, pedometer, tilt, filtering, and tap recognition functions configuration register (r/w). Table 175. TAP_CFG register TIMER_ EN PEDO_EN TILT_EN SLOPE TAP_X_EN TAP_Y_EN _FDS TAP_Z_EN LIR Table 176. TAP_CFG register description 9.73 TIMER_EN Time stamp count enable, output data are collected in TIMESTAMP0_REG (40h), TIMESTAMP1_REG (41h), TIMESTAMP2_REG (42h) register.
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Register description LSM6DS3 Table 179. Threshold for D4D/D6D function SIXD_THS[1:0] 9.74 Threshold value 00 80 degrees 01 70 degrees 10 60 degrees 11 50 degrees INT_DUR2 (5Ah) Tap recognition function setting register (r/w). Table 180. INT_DUR2 register DUR3 DUR2 DUR1 DUR0 QUIET1 QUIET0 SHOCK1 SHOCK0 Table 181. INT_DUR2 register description 9.75 DUR[3:0] Duration of maximum time gap for double tap recognition.
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LSM6DS3 Register description Table 183. WAKE_UP_THS register description 9.76 SINGLE_DOUBLE_TAP Single/double-tap event enable. Default: 0 (0: only single-tap event enabled; 1: both single and double-tap events enabled) INACTIVITY Inactivity event enable. Default value: 0 (0: sleep disabled; 1: sleep enabled) WK_THS[5:0] Threshold for wakeup. Default value: 000000 WAKE_UP_DUR (5Ch) Free-fall, wakeup, time stamp and sleep mode functions duration setting register (r/w). Table 184.
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Register description LSM6DS3 Table 188. Threshold for free-fall function FF_THS[2:0] 9.78 Threshold value 000 156 mg 001 219 mg 010 250 mg 011 312 mg 100 344 mg 101 406 mg 110 469 mg 111 500 mg MD1_CFG (5Eh) Functions routing on INT1 register (r/w). Table 189. MD1_CFG register INT1_ INACT_ STATE INT1_ SINGLE_ TAP INT1_WU INT1_FF INT1_ DOUBLE_ TAP INT1_6D INT1_TILT INT1_ TIMER Table 190. MD1_CFG register description INT1_INACT_ STATE Routing on INT1 of inactivity mode.
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LSM6DS3 9.79 Register description MD2_CFG (5Fh) Functions routing on INT2 register (r/w). Table 191. MD2_CFG register INT2_ INACT_ STATE INT2_ SINGLE_ TAP INT2_WU INT2_FF INT2_ DOUBLE_ TAP INT2_6D INT2_TILT INT2_ IRON Table 192. MD2_CFG register description INT2_INACT_ STATE Routing on INT2 of inactivity mode. Default: 0 (0: routing on INT2 of inactivity disabled; 1: routing on INT2 of inactivity enabled) Single-tap recognition routing on INT2.
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Register description LSM6DS3 Table 196. OUT_MAG_RAW_X_H register description D[15:8] 9.82 X-axis external magnetometer value (MSbyte) OUT_MAG_RAW_Y_L (68h) External magnetometer raw data (r). Table 197. OUT_MAG_RAW_Y_L register D7 D6 D5 D4 D3 D2 D1 D0 Table 198. OUT_MAG_RAW_Y_L register description D[7:0] 9.83 Y-axis external magnetometer value (LSbyte) OUT_MAG_RAW_Y_H (69h) External magnetometer raw data (r). Table 199.
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LSM6DS3 10 Embedded functions register mapping Embedded functions register mapping The table given below provides a list of the registers for the embedded functions available in the device and the corresponding addresses. Embedded functions registers are accessible when FUNC_CFG_EN is set to ‘1’ in FUNC_CFG_ACCESS (01h). Table 205.
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Embedded functions register mapping LSM6DS3 Table 205. Registers address map - embedded functions (continued) Register address Name Type Default Hex Binary MAG_OFFX_L r/w 2D 00101101 00000000 MAG_OFFX_H r/w 2E 00101110 00000000 MAG_OFFY_L r/w 2F 00101111 00000000 MAG_OFFY_H r/w 30 00110000 00000000 MAG_OFFZ_L r/w 31 00110001 00000000 MAG_OFFZ_H r/w 32 00110010 00000000 Comment Registers marked as Reserved must not be changed.
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LSM6DS3 Embedded functions registers description 11 Embedded functions registers description 11.1 SLV0_ADD (02h) I2C slave address of the first external sensor (Sensor1) register (r/w). Table 206. SLV0_ADD register Slave0_ add6 Slave0_ add5 Slave0_ add4 Slave0_ add3 Slave0_ add2 Slave0_ add1 Slave0_ add0 rw_0 Table 207. SLV0_ADD register description 2 11.2 Slave0_add[6:0] I C slave address of Sensor1 that can be read by sensor hub.
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Embedded functions registers description LSM6DS3 Table 211. SLAVE0_CONFIG register description Slave0_rate[1:0] Decimation of read operation on Sensor1 starting from the sensor hub trigger. Default value: 00 (00: no decimation 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) Aux_sens_on[1:0] Number of external sensors to be read by sensor hub.
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LSM6DS3 11.6 Embedded functions registers description SLAVE1_CONFIG (07h) Second external sensor (Sensor2) configuration register (r/w). Table 216. SLAVE1_CONFIG register Slave1_ rate1 Slave1_ rate0 0(1) 0(1) 0(1) Slave1_ numop2 Slave1_ numop1 Slave1_ numop0 1. This bit must be set to ‘0’ for the correct operation of the device. Table 217. SLAVE1_CONFIG register description 11.7 Slave1_rate[1:0] Decimation of read operation on Sensor2 starting from the sensor hub trigger.
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Embedded functions registers description 11.9 LSM6DS3 SLAVE2_CONFIG (0Ah) Third external sensor (Sensor3) configuration register (r/w). Table 222. SLAVE2_CONFIG register Slave2_ rate1 Slave2_ rate0 0(1) 0(1) 0(1) Slave2_ numop2 Slave2_ numop1 Slave2_ numop0 1. This bit must be set to ‘0’ for the correct operation of the device. Table 223. SLAVE2_CONFIG register description Decimation of read operation on Sensor3 starting from the sensor hub trigger.
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LSM6DS3 11.12 Embedded functions registers description SLAVE3_CONFIG (0Dh) Fourth external sensor (Sensor4) configuration register (r/w). Table 228. SLAVE3_CONFIG register Slave3_ rate1 Slave3_ rate0 0(1) 0(1) 0(1) Slave3_ numop2 Slave3_ numop1 Slave3_ numop0 1. This bit must be set to ‘0’ for the correct operation of the device. Table 229. SLAVE3_CONFIG register description 11.13 Slave3_rate[1:0] Decimation of read operation on Sensor4 starting from the sensor hub trigger.
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Embedded functions registers description 11.14 LSM6DS3 PEDO_THS_REG (0Fh) Table 232. PEDO_THS_REG register default values PEDO_4G - - THS_ MIN4 THS_ MIN3 THS_ MIN2 THS_ MIN1 THS_ MIN0 Table 233. PEDO_THS_REG register description PEDO_ 4G This bit sets the internal full scale used in pedometer functions. Using this bit, saturation is avoided (e.g. FAST walk). 0: internal full scale = 2 g.
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LSM6DS3 11.16 Embedded functions registers description PEDO_DEB_REG (14h) Table 236. PEDO_DEB_REG register default values DEB_ TIME4 DEB_ TIME3 DEB_ TIME2 DEB_ TIME1 DEB_ TIME0 DEB_ STEP2 DEB_ STEP1 DEB_ STEP0 0 0 0 0 0 1 1 0 Table 237.
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Embedded functions registers description 11.17 LSM6DS3 STEP_COUNT_DELTA (15h) Time period register for step detection on delta time (r/w). Table 238. STEP_COUNT_DELTA register SC_ DELTA_7 SC_ DELTA_6 SC_ DELTA_5 SC_ DELTA_4 SC_ DELTA_3 SC_ DELTA_2 SC_ DELTA_1 SC_ DELTA_0 Table 239. STEP_COUNT_DELTA register description SC_DELTA[7:0] Time period value(1) (1LSB = 1.6384 s) 1.
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LSM6DS3 11.21 Embedded functions registers description MAG_SI_YX (27h) Soft-iron matrix correction register (r/w). Table 246. MAG_SI_YX register MAG_SI_ YX_7 MAG_SI_ YX_6 MAG_SI_ YX_5 MAG_SI_ YX_4 MAG_SI_ YX_3 MAG_SI_ YX_2 MAG_SI_ YX_1 MAG_SI_ YX_0 Table 247. MAG_SI_YX register description MAG_SI_YX_[7:0] Soft-iron correction row2 col1 coefficient(1). Default value: 00000000 1. Value is expressed in sign-module format. 11.22 MAG_SI_YY (28h) Soft-iron matrix correction register (r/w).
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Embedded functions registers description 11.25 LSM6DS3 MAG_SI_ZY (2Bh) Soft-iron matrix correction register (r/w). Table 254. MAG_SI_ZY register MAG_SI_ ZY_7 MAG_SI_ ZY_6 MAG_SI_ ZY_5 MAG_SI_ ZY_4 MAG_SI_ ZY_3 MAG_SI_ ZY_2 MAG_SI_ ZY_1 MAG_SI_ ZY_0 Table 255. MAG_SI_ZY register description MAG_SI_ZY_[7:0] Soft-iron correction row3 col2 coefficient(1). Default value: 00000000 1. Value is expressed in sign-module format. 11.26 MAG_SI_ZZ (2Ch) Soft-iron matrix correction register (r/w).
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LSM6DS3 11.29 Embedded functions registers description MAG_OFFY_L (2Fh) Offset for Y-axis hard-iron compensation register (r/w). The value is expressed as a 16-bit word in two’s complement. Table 262. MAG_OFFY_L register MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF Y_L_7 Y_L_6 Y_L_5 Y_L_4 Y_L_3 Y_L_2 Y_L_1 Y_L_0 Table 263. MAG_OFFY_L register description MAG_OFFY_L_[7:0] 11.30 Offset for Y-axis hard-iron compensation.
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Soldering information 12 LSM6DS3 Soldering information The LGA package is compliant with the ECOPACK®, RoHS and "Green" standard. It is qualified for soldering heat resistance according to JEDEC J-STD-020. Leave "Pin 1 Indicator" unconnected during soldering. Land pattern and soldering recommendations are available at www.st.com/mems.
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LSM6DS3 13 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 13.1 LGA-14 package information Figure 16. LGA-14 2.5x3x0.
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Package information 13.2 LSM6DS3 LGA-14 packing information Figure 17. Carrier tape information for LGA-14 package Figure 18.
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LSM6DS3 Package information Figure 19. Reel information for carrier tape of LGA-14 package Table 270. Reel dimensions for carrier tape of LGA-14 package Reel dimensions (mm) A (max) 330 B (min) 1.5 C 13 ±0.25 D (min) 20.2 N (min) 60 G 12.4 +2/-0 T (max) 18.
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Revision history 14 LSM6DS3 Revision history Table 271. Document revision history Date Revision 03-Nov-2014 1 Initial release 18-Dec-2014 2 Updated Section 2: Embedded low-power features and subsection Updated Section 5.4: FIFO and subsections Added Section 5.4.
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LSM6DS3 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.