Datasheet

Rev. 1.10 6 May 16, 2011 Rev. 1.10 7 May 16, 2011
HT16K33
RAM Mapping 16*8 LED Controller Driver with keyscan
D.C. Characteristics
V
DD
=4.5~5.5V; Ta=25°C (Unless otherwise specied)
Symbol Parameter
Test Conditions
Min. Typ. Max. Unit
V
DD
Conditions
V
DD
Operating Voltage 4.5 5 5.5 V
I
DD
Operating Current 5
No load, normal operation,
INT/ROW bit is set to “0”
1 2 mA
I
STB
Standby Current 5 No load, standby mode 1 10 μA
V
IH
Input high Voltage 5 SDA,SCL 0.7V
DD
V
DD
V
V
IL
Input Low Voltage 5 SDA, SCL 0 0.3V
DD
V
I
IL
Input leakage current V
IN
= V
SS
or V
DD
-1 1 μA
R
PL
Input pull-low resistor 5
ROW3/K1~ROW15/K13,
ROW0/A2~ROW2/A0 Keyscan
during
250
I
OL1
Low level output current 5 V
OL
=0.4V; SDA 6 mA
I
OL2
ROW Sink Current 5 V
OL
=0.4V, INT pin 6 mA
I
OH1
ROW Source Current 5
V
OH
=V
DD
-2V, (ROW0~ROW15 pin)
-20 -25 -40 mA
V
OH
=V
DD
-3V, (ROW0~ROW15 pin )
-25 -30 -50 mA
I
math
ROW Source Current
tolerance
5
V
OH
=V
DD
-3V, (ROW0~ROW15 pin )
5 %
I
OL3
COM Sink Current 5 V
OL
=0.3V, (COM0~COM7 pin) 160 200 mA
I
OH2
COM Source Current 5 V
OH
=V
DD
-2V, (COM0~COM3 pin) -20 -25 -40 mA
A.C. Characteristics
V
DD
=4.5~5.5V; Ta=25°C (Unless otherwise specied)
Symbol Parameter
Test condition
Min. Typ. Max. Unit
V
DD
Condition
t
LED
LED Frame time
5 1/9 Duty 7.6 9.5 11.4 ms
t
OFF
V
DD
OFF Time V
DD
drop down to 0V 20 ms
t
SR
V
DD
Slew Rate 0.05 V/ms
Note: 1. If the Power on Reset timing conditions are not satised in the power ON/OFF sequence, the internal
Power on Reset circuit will not operate normally.
2. I
f VDD drops below the minimum voltage of the operating voltage spec. during operating, the Power on
Reset timing conditions must also be satised. That is, VDD must drop to 0V and remain at 0V for 20ms (min.)
before rising to the normal operating voltage.