Datasheet

Rev. 1.10 28 May 16, 2011 Rev. 1.10 29 May 16, 2011
HT16K33
RAM Mapping 16*8 LED Controller Driver with keyscan
Read Operation
Byte read operation
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A byte read operation requires a START condition, slave address with R/W bit, a x valid Register
address, slave address with R bit, a Data and a NACK signal and a STOP condition.
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The Byte reads command is not available for Key data reading.
Slave Address
ACK
Write
Command / register address byte
ACK
S 1 1 1 0 A2 A1 A0 0
D15 D14 D13 D12 D11 D10 D9 D8
Slave Address
Read
S 1 1 1 0 A2 A1 A0 1
P
ACK
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
1 byte data
P
NACK
Reading Single Data Bytes from the HT16K33
Page read operation
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In this mode, the master reads the HT16K33 data after setting the slave address. Following a
R/W bit (=“0”) and acknowledge bit, the register address (An) is written to the address W pointer.
Next the START condition and slave address are repeated followed by a R/W bit (=“1”). The data
which was addressed is then transmitted. The address pointer is only incremented on reception of
an acknowledge clock. The HT16K33 will place the data at address An+1 on the bus. The master
reads and acknowledges the new byte and the address pointer is incremented to “An+2”.
●
If the register address (An) is 0X00h ~ 0X0Fh, after reaching the memory location 0X0Fh, the
pointer will be reset to 0X00h.
●
The key data RAM of address 0x40H~0x45H should be read continuously and completed in one
operation, so the key data RAM of address should be started from 0x40H only.
●
This cycle of reading consecutive addresses will continue until the master sends a NACK signal
and STOP condition.
Slave Address
ACK
Write
Command / register address byte
ACK
S 1 1 1 0 A2 A1 A0 0
D15 D14 D13 D12 D11 D10 D9 D8
Data byte
NACK
P
D7 D6 D5 D4 D3 D2 D1 D0
n bytes data
Slave Address
Read
S 1 1 1 0 A2 A1 A0 1
P
ACK
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
First byte data
ACK
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
Second byte data
∫∫
ACK
Reading n Data Bytes from the HT16K33