Datasheet

Other recommendations
Make sure to route
all
the VSYS_5V and GND pins, and add decoupling (bypass) capacitors between VSYS_5V and
GND near the mating connector pins.
When placing a pull-up or pull-down resistor on some of the SoM signals, such as I/O pins (especially SAI1_TXD[7:0]
and SAI1_RXD[7:0]), review the signal description for each peripheral interface, because some of them already
have pull-up/down resistor in the SoM for initialization purposes.
Caution: You must provide a cooling solution to ensure the SoM surface maintains an operational
temperature as specified in the Environmental reliability section. You can use the SoM's threaded
standoffs (indicated in figure 3) to mount a passive or active cooling solution.
Pinout schematic
Caution: The signal directions in figure 6 are not all accurate. Instead refer to the "type" of each pin in the
tables from the Peripheral interfaces section.
Version 1.2 (August 2019)
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