Datasheet
Trace impedance recommendations
The following table lists the recommended impedance for high-speed signals on the baseboard.
MIPI trace length compensation
MIPI signals for the CSI/DSI interfaces are high-speed signals that require the total etched trace lengths for each line
within a group (the paired clock lanes and four data lanes) be equal to each other. Due to space constraints on the
SoM, the MIPI signal traces lengths currently are not equal (as indicated in the following tables). You must incorporate
the length difference on your baseboard traces such that the trace lengths for each MIPI group match each other.
Version 1.2 (August 2019)
Table 29. Trace impedance recommendation
Signal group Impedance PCB manufacture
tolerance (+/-)
All single-ended signal, unless specified 50 Ohm single-ended 10%
PCIe TX/RX data pair 85 Ohm differential 10%
USB differential signals 90 Ohm differential 10%
Differential signals: including Ethernet, PCIe clocks, HDMI, MIPI
(CSI and DSI)
100 Ohm differential 10%
Table 30. CSI channel 1 signal trace length on SoM
Name Etch length (mils) Manhattan length (mils)
MIPI_CSI1_CLKN 306.1 287.89
MIPI_CSI1_CLKP 309.4 297.73
MIPI_CSI1_D0N 310.97 309.53
MIPI_CSI1_D0P 315.24 319.38
MIPI_CSI1_D1N 242.48 209.15
MIPI_CSI1_D1P 241.23 250.5
MIPI_CSI1_D2N 354.22 356.78
MIPI_CSI1_D2P 351.84 392.21
MIPI_CSI1_D3N 246.25 230.81
MIPI_CSI1_D3P 250.2 272.16
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