Datasheet

JTAG debugging
5-pin JTAG debugging with a Secure JTAG Controller (SJC) for secure debugging.
I2C
Two I2C bus interfaces are available.
Note: The SoC also includes I2C1 and I2C4 lines, but these are used by the SoM for power management
and wireless controls, so you should not remap these with your own device tree.
Version 1.2 (August 2019)
Table 21. JTAG pin signals
Name Type Connector Pins Voltage Description
JTAG_TMS Output J1312 59 3.3V Test mode select
JTAG_TDI Input J1312 61 3.3V Test data in
JTAG_TDO Output J1312 57 3.3V Test data out
JTAG_TCK Output J1312 53 3.3V Test clock
JTAG_nTRST Input J1312 55 3.3V Test reset
Table 22. I2C pin signals
Name Type Connector Pins Voltage Description
I2C2_SCL Input J1311 87 3.3V Serial clock
Pull-up in SoM: 4.7k Ohm
I2C2_SDA Output J1311 85 3.3V Serial data
Pull-up in SoM: 4.7k Ohm
I2C3_SCL Input J1311 83 3.3V Serial clock
Pull-up in SoM: 4.7k Ohm
I2C3_SDA Output J1311 81 3.3V Serial data
Pull-up in SoM: 4.7k Ohm
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