Datasheet
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RESET
3.3V
External clock to
the McASP0
interface.
Oscillator can be disabled via
SW for power down modes or if
GPIO3_21 needs to be used.
H
1.8V
1.8V
3.3V
DNP
DGND
DGND
VDD_3V3B
DGND
DGNDDGNDDGND
DGND
VDD_3V3B VDD_3V3B
DGND
DGND
VDD_3V3A
DGND
VDD_3V3A
DGND
DDR_VREF
DGND
VDD_3V3A
DGND
DGND
VIO
GND_OSC0
DGND
VDD_3V3A
GND_OSC0
DGND
DGND
VDD_3V3A VDD_3V3AVDD_3V3A
GND_OSC0GND_OSC0
VDD_3V3A
USB1_OCn 4
USR1 6
USR0 6
PMIC_INT
2
MMC0_CLKO 9
MMC0_DAT1
9
MMC0_DAT0
9
MMC0_CMD
9
MMC0_DAT3
9
MMC0_DAT2
9
PMIC_PGOOD2
MMC1_DAT6 8,9
MMC1_DAT7 8,9
EHRPWM1A 9
EHRPWM1B 9
MMC1_DAT4 8,9
MMC1_DAT5 8,9
GPIO1_28
9,10
GPIO2_1 9,10
MMC1_CLK
8,9
MMC1_CMD
8,9
TIMER7 9
UART4_RXD
9
UART4_TXD 9
TIMER6 9
TIMER5 9
TIMER4 9
GPIO1_29 9,10
GPIO1_16 9
GPIO1_17 9
DDR_RESETn7
EHRPWM2A 9
EHRPWM2B
9
GPIO0_26 9,10
GPIO0_27 9,10
GPIO1_12 9,10
GPIO1_13 9,10
GPIO1_14 9,10
GPIO1_15 9,10
CLKOUT2 3,9,10
MMC0_CD4,9
USR3 6
USR2 6
HDMI_INT
GPIO3_20 4
CLKOUT2 3,9,10
MMC1_DAT0 8,9
MMC1_DAT1 8,9
MMC1_DAT2 8,9
MMC1_DAT3 8,9
eMMC_RSTn 8
DDR_D[15..0]7
DDR_BA[2..0]
7
DDR_A[15..0]7
DDR_CLK7
DDR_WEn7
DDR_RASn7
DDR_CASn7
DDR_CLKn7
DDR_DQS17
DDR_DQM07
DDR_DQM17
DDR_CKE7
DDR_DQS07
DDR_CSn7
DDR_ODT7
DDR_DQSN17
DDR_DQSN07
LDO_PGOOD2
GPIO3_21 4,9
SYS_RESETn 9
GPIO2_0
10
Title
Size Document Number Rev
Date: Sheet of
v1.0
BeagleBone Green Processor 1 of 3 and JTAG
C
3 11Monday, March 14, 2016
Title
Size Document Number Rev
Date: Sheet of
v1.0
BeagleBone Green Processor 1 of 3 and JTAG
C
3 11Monday, March 14, 2016
Title
Size Document Number Rev
Date: Sheet of
v1.0
BeagleBone Green Processor 1 of 3 and JTAG
C
3 11Monday, March 14, 2016
R167 33R,5%
R23
4.7K,5%
R172
4.7K,5%,DNP
C29
0.1uf,16V
R171
4.7K,5%,DNP
R170
0R,1% DNP
P2
CTI JTAG,DNI
TMS
1
TDI
3
TVDD
5
TDO
7
TCKRTN
9
TCK
11
EMU0
13
SRST
15
EMU2
17
EMU4
19
TRSTn
2
TDIS
4
NC
6
GND1
8
GND2
10
GND3
12
EMU1
14
GND4
16
EMU3
18
GND5
20
C24
2.2uF,6.3V
R235 0R,1%
15mm x 15mm
Package
SubArctic AM335x
1.8V
U5A
AM3358BZCZ100
OSC1_IN
A6
OSC1_OUT
A4
OSC0_IN
V10
OSC0_OUT
U11
GPMC_CLK/LCD_MEM_CLK/GPMC_WAIT1/MMC2_CLK/PRT1_MII1_TXEN/MCASP0_FSR/GPIO2_1
V12
GPMC_CSN0/GPIO1_29
V6
GPMC_CSN1/GPMC_CLK/MMC1_CLK/PRT1EDIO_DATA_IN6/PRT1_EDIO_DATA_OUT6/PR1_PRU1_PRU_R30_12/PR1_PRU1_PRU_R31_12/GPIO1_30
U9
GPMC_CSN2/GPMC_BE1N/MMC1_CMD/PR1_EDIO_DATA_IN7/PR1_EDIO_DATA_OUT7/PR1_PRU1_PRU_R30_13/PR1_PRU1_PRU_R31_13/GPIO1_31
V9
GPMC_WEN/TIMER6/GPIO2_4
U6
GPMC_OEN_REN/TIMER7/EMU4/GPIO2_3
T7
GPMC_CSN3/MMC2_CMD/PR1_MDIO_DATA/GPIO2_0
T13
GPMC_ADVN_ALE/TIMER4/GPIO2_2
R7
GPMC_BE0N_CLE/TIMER5/GPIO2_5
T6
GPMC_BE1N/GMII2_COL/GPMC_CSN6/MMC2_DAT3/GPMC_DIR/PR1_MII1_RXLINK/MCASP0_ACLKR/GPIO1_28
U18
GPMC_WAIT0/GM112_CRS/GPMC_CSN4/RMII2_CRS_DV/MMC1_SDCD/PR1_MII1_RXDV/UART4_RXD/GPIO0_30
T17
GPMC_AD0/MMC1_DAT0//////GPIO1_0
U7
GPMC_AD1/MMC1_DAT1//////GPIO1_1
V7
GPMC_AD2/MMC1_DAT2//////GPIO1_2
R8
GPMC_AD3/MMC1_DAT3//////GPIO1_3
T8
GPMC_AD4/MMC1_DAT4//////GPIO1_4
U8
GPMC_AD5/MMC1_DAT5//////GPIO1_5
V8
GPMC_AD6/MMC1_DAT6//////GPIO1_6
R9
GPMC_AD7/MMC1_DAT7//////GPIO1_7
T9
GPMC_AD8/LCD_DATA23/MMC1_DAT0/MMC2_DAT4/EHRPWM2A/PR1_MII_MT0_CLK//GPIO0_22
U10
GPMC_AD9/LCD_DATA22/MMC1_DAT1/MMC2_DAT5/EHRPWM2B/PR1_MII0_CRS//GPIO0_23
T10
GPMC_AD10/LCD_DATA21/MMC1_DAT2/MMC2_DAT6/EHRPWM2_TRIPZONE_INPUT/PR1_MII0_TXEN//GPIO0_26
T11
GPMC_AD11/LCD_DATA20/MMC1_DAT3/MMC2_DAT7/EHRPWM2_SYNCI_O/PR1_MII0_TXD3//GPIO0_27
U12
GPMC_AD12/LCD_DATA19/MMC1_DAT4/MMC2_DAT0/EQEP2A_IN/PR1_MII0_TXD2/PR1_PRU0_PRU_R30_14/GPIO1_12
T12
GPMC_AD13/LCD_DATA18/MMC1_DAT5/MMC2_DAT1/EQEP2B_IN/PR1_MII0_TXD1/PR1_PRU0_PRU_R30_15/GPIO1_13
R12
GPMC_AD14/LCD_DATA17/MMC1_DAT6/MMC2_DAT2/EQEP2_INDEX/PR1_MII0_TXD0/PR1_PRU0_PRU_R31_14/GPIO1_14
V13
GPMC_AD15/LCD_DATA16/MMC1_DAT7/MMC2_DAT3/EQEP2_STROBE/PR1_ECAP0_ECAP_CAPIN_APWM_O/PR1_PRU0_PRU_R31_15/GPIO1_15
U13
GPMC_A0/GMII2_TXEN/RGMII2_TCTL/RMII2_TXEN/GPMC_A16/PR1_MII_MT1_CLK/EHRPWM1_TRIPZONE_INPUT/GPIO1_16
R13
GPMC_A1/GMII2_RXDV/RGMII2_RCTL/MMC2_DAT0/GPMC_A17/PR1_MII1_TXD3/EHRPWM1_SYNCI_O/GPIO1_17
V14
GPMC_A2/GMII2_TXD3/RGMII2_TD3/MMC2_DAT1/GPMC_A18/PR1_MII1_TXD2/EHRPWM1A/GPIO1_18
U14
GPMC_A3/GMII2_TXD2/RGMII2_TD2/MMC2_DAT2/GPMC_A19/PR1_MII1_TXD1/EHRPWM1B/GPIO1_19
T14
GPMC_A4/GMII2_TXD1/RGMII2_TD1/RMII2_TXD1/GPMC_A20/PR1_MII1_TXD0/EQEP1A_IN/GPIO1_20
R14
GPMC_A5/GMII2_TXD0/RGMII2_TD0/RMII2_TXD0/GPMC_A21/PR1_MII1_RXD3/EQEP1B_IN/GPIO1_21
V15
GPMC_A6/GMII2_TXCLK/RGMII2_TCLK/MMC2_DAT4/GPMC_A22/PR1_MII1_RXD2/EQEP1_INDEX/GPIO1_22
U15
GPMC_A7/GMII2_RXCLK/RGMII2_RCLK/MMC2_DAT5/GPMC_A23/PR1_MII1_RXD1/EQEP1_STROBE/GPIO1_23
T15
GPMC_A8/GMII2_RXD3/RGMII2_RD3/MMC2_DAT6/GPMC_A24/PR1_MII1_RXD0/MCASP0_ACLKX/GPIO1_24
V16
GPMC_A9/GMII2_RXD2/RGMII2_RD2/MMC2_DAT7/GPMC_A25/PR1_MII_MR1_CLK/MCASP0_FSX/GPIO1_25
U16
GPMC_A10/GMII2_RXD1/RGMII2_RD1/RMII2_RXD1/GPMC_A26/PR1_MII1_CRS/MCASP0_AXR0/GPIO1_26
T16
GPMC_A11/GMII2_RXD0/RGMII2_RD0/RMII2_RXD0/GPMC_A27/PR1_MII1_RXER/MCASP0_AXR1/GPIO1_27
V17
MMC0_CLK/GPMC_A24/UART3_CTSN/UART2_RXD/DCAN1_TX/PR1_PRU0_PRU_R30_12/PR1_PRU0_PRU_R31_12/GPIO2_30
G17
MMC0_CMD/GPMC_A25/UART3_RTSN/UART2_TXD/DCAN1_RX/PR1_PRU0_PRU_R30_13/PR1_PRU0_PRU_R31_13/GPIO2_31
G18
MMC0_DAT0/GPMC_A23/UART5_RTSN/UART3_TXD/UART1_RIN/PR1_PRU0_PRU_R30_11/PR1_PRU0_PRU_R31_11/GPIO2_29
G16
MMC0_DAT1/GPMC_A22/UART5_CTSN/UART3_RXD/UART1_DTRN/PR1_PRU0_PRU_R30_10/PR1_PRU0_PRU_R31_10/GPIO2_28
G15
MMC0_DAT2/GPMC_A21/UART4_RTSN/TIMER6/UART1_DSRN/PR1_PRU0_PRU_R30_9/PR1_PRU0_PRU_R31_9/GPIO2_27
F18
MMC0_DAT3/GPMC_A20/UART4_CTSN/TIMER5/UART1_DCDN/PR1_PRU0_PRU_R30_8/PR1_PRU0_PRU_R31_8/GPIO2_26
F17
PORZn
B15
NRESET_INOUT
A10
NNMI
B18
EVENT_INTR0/TIMER4/CLKOUT1/SPI1_CS1/PR1PRU1R31_16/EMU2/GPIO0_19
A15
EVENT_INTR1/TCLKIN/CLKOUT2/TIMER7/PR1PRU0_PRUR31_16/EMU3/GPIO0_20
D14
TMS
C11
NTRST
B10
TCK
A12
TDI
B11
TDO
A11
EMU0/GPIO3_7
C14
DDR_A0
F3
DDR_A1
H1
DDR_A2
E4
DDR_A3
C3
DDR_A4
C2
DDR_A5
B1
DDR_A6
D5
DDR_A7
E2
DDR_A8
D4
DDR_A9
C1
DDR_A10
F4
DDR_A11
F2
DDR_A12
E3
DDR_A13
H3
DDR_A14
H4
DDR_D0
M3
DDR_D1
M4
DDR_D2
N1
DDR_D3
N2
DDR_D4
N3
DDR_D5
N4
DDR_D6
P3
DDR_D7
P4
DDR_D8
J1
DDR_D9
K1
DDR_D10
K2
DDR_D11
K3
DDR_D12
K4
DDR_D13
L3
DDR_D14
L4
DDR_D15
M1
DDR_CK
D2
DDR_NCK
D1
DDR_CSN0
H2
DDR_CASN
F1
DDR_RASN
G4
DDR_WEn
B2
DDR_BA0
C4
DDR_BA1
E1
DDR_BA2
B3
DDR_DQM0
M2
DDR_DQS0
P1
DDR_DQSN0
P2
DDR_DQM1
J2
DDR_DQS1
L1
DDR_DQSN1
L2
DDR_ODT
G1
EMU1/GPIO3_8
B14
VSS_RTC
A5
VSS_OSC0
V11
GPMC_WPN/GMII2_RXERR/GPMC_CSN5/RMII2_RXERR/MMC2_SDCD/PR1_MDIO_MDCLK/UART4_TXD/GPIO0_31
U17
DDR_CKE
G3
DDR_RESETN
G2
DDR_VTP
J3
DDR_A15
D3
RTC_PORZn
B5
VREFSSTL
J4
R29
0R,1%
R17
1M,1%
R162
0R,1%
C21
18pF,50V
R169
0R,1% DNP
C159
0.1uf,16V
R24
4.7K,5%
C25
18pF,50V
R20
0R,1%
U16
SN74LVC1G07DCK
A
2
Y
4
GND
3
VCC
5
NC
1
R19
0R,1%
R18 33R,5%
R175
4.7K,5%,DNP
R234 0R,1%
R161
0R,1%
R2249.9,1%
C30
0.1uf,16V
R30
0R,1%
Y2
24MHz
1 2
Y4
24.576MHZ
OE
1
GND
2
VCC
4
CLK
3
S1
SMD Button Top
1 2
3 4
Y1
32.768KHz MC-306
1
4
3
2
U3
SN74LVC1G06DCK
A
2
Y
4
GND
3
VCC
5
NC
1
R173
4.7K,5%,DNP
R14
10K,1%
R174
4.7K,5%,DNP
R160
0R,1%
U17
SSDCI3128AF,DNP
XIN/CXIN
1
CKOUT
2
SSON
3
GND
4
MOD OUT
5
ADS0
6
ADS1
7
VDD
8
C26
18pF,50V
C22
18pF,50V
C28
0.1uf,16V
C158
0.1uf,16V
R25
4.7K,5%
DDR_VTP
GND_OSC1
OSC1_IN
OSC1_OUT
JTAG_TRSTn
JTAG_TMS
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_EMU0
JTAG_EMU1
OSC1_OUT1
U5_R13
JTAG_TDO
JTAG_TMS
XDMA_EVENT_INTR0
JTAG_TDI
JTAG_TCK
JTAG_EMU0 JTAG_EMU1
JTAG_TRSTn
XDMA_EVENT_INTR0
SYS_RESETn
DDR_D1
DDR_D8
DDR_D9
DDR_D6
DDR_D3
DDR_D4
DDR_D14
DDR_D11
DDR_D12
DDR_D13
DDR_D10
DDR_D7
DDR_D15
DDR_D[15..0]
DDR_BA[2..0]
DDR_BA1
DDR_BA0
DDR_A2
DDR_A1
DDR_A0
DDR_A7
DDR_A6
DDR_A5
DDR_A4
DDR_A3
DDR_A13
DDR_A12
DDR_A11
DDR_A10
DDR_A9
DDR_A8
DDR_A[15..0]
DDR_A14
DDR_BA2
DDR_D5
DDR_D2
DDR_D0
PROC_A15
U5_T13
HDMICLK_DISn
CLKOUT_SRC
DDR_A15
OSC0_IN
OSC0_OUT