Datasheet

54
LDC1612
,
LDC1614
SNOSCY9A DECEMBER 2014REVISED MARCH 2018
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Product Folder Links: LDC1612 LDC1614
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10 Layout
10.1 Layout Guidelines
Avoid long traces between the sensor and the LDC - higher frequency sensors may need to be placed closer to
the device to minimize noise. The INAx and INBx traces should be routed as differential pairs - run the traces in
parallel and close together. Lower trace impedances (even well below 100 Ω) are acceptable, as they reduce any
parasitic inductance.
The sensor capacitor should be placed close to the inductor to minimize the sensor R
P
.
Do not place filled planes underneath or between the sensor layers. If the sensor is placed in a plane, there
should be a gap of at least 20% of a sensor diameter between the plane and the outermost coil of the sensor.
There should not be any continuous ring of conductors encircling the sensor. This can be managed with a small
cut in the conductor.
Refer to the TI Application Note LDC Sensor Design for more information on sensor design and optimization.
10.2 Layout Example
Figure 64 shows an example layout for the LDC1612, including a pair of sensors.
Figure 64. Example PCB Layout