Datasheet
17
LDC1612
,
LDC1614
www.ti.com
SNOSCY9A –DECEMBER 2014–REVISED MARCH 2018
Product Folder Links: LDC1612 LDC1614
Submit Documentation FeedbackCopyright © 2014–2018, Texas Instruments Incorporated
7.6.4 Address 0x02, DATA1_MSB
Figure 17. Address 0x02, DATA1_MSB
15 14 13 12 11 10 9 8
ERR_UR1 ERR_OR1 ERR_WD1 ERR_AE1 DATA1[27:16]
7 6 5 4 3 2 1 0
DATA1[27:16]
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 3. Address 0x02, DATA1_MSB Field Descriptions
Bit Field Type Reset Description
15 ERR_UR1 R 0 Channel 1 Conversion Under-range Error Flag
Cleared by reading the bit.
14 ERR_OR1 R 0 Channel 1 Conversion Over-range Error Flag
Cleared by reading the bit.
13 ERR_WD1 R 0 Channel 1 Conversion Watchdog Timeout Error Flag
Cleared by reading the bit.
12 ERR_AE1 R 0 Channel 1 Conversion Amplitude Error Flag
Cleared by reading the bit.
11:0 DATA1[27:16] R 0x000 Channel 1 MSB Conversion Result (MSB)
7.6.5 Address 0x03, DATA1_LSB
Figure 18. Address 0x03, DATA1_LSB
15 14 13 12 11 10 9 8
DATA1 [15:0]
7 6 5 4 3 2 1 0
DATA1 [15:0]
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4. Address 0x03, DATA1_LSB Field Descriptions
Bit Field Type Reset Description
15:0 DATA1[15:0] R 0x0000 Channel 1 LSB Conversion Result (LSB)
This register must be read after DATA1_MSB to ensure data
coherency.