Datasheet

Data Sheet
BMA456
Page 108
BST-BMA456-DS000-01 | Version 1.1 | October 2017 Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to third parties.
BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice.
CSB
SCX
SDX
SDO
AD6 AD5 AD4 AD3 AD2 AD1 AD0R/W XX
Z
X
X
7
6 5 3 2 1
0
DO6 DO5 DO4 DO3 DO2 DO1 DO0DO7
R/W + register address Dummy Dummy Read Datalogical
4-wire basic SPI read sequence (mode ´00´)
The data bits are used as follows:
R/W: Read/Write bit. When 0, the data SDI is written into the chip. When 1, the data SDO from the
chip is read.
AD6-AD0: Address
DI7-DI0: When in write mode, these are the data SDI, which will be written into the address.
DO7-DO0: When in read mode, these are the data SDO, which are read from the address.
Multiple read operations are possible by keeping CSB low and continuing the data transfer. Only the
first register address has to be written. Addresses are automatically incremented after each read
access as long as CSB stays active low. Please note that the first byte received from the BMA456 via
the SDO line correspond to a dummy byte and the 2
nd
byte correspond to the value read out of the
specified register address. The successive bytes read out correspond to values of incremented register
addresses. That means, for a multiple read operation of n bytes, n+1 bytes have to be read, the first
has to be dropped and the successive bytes must be interpreted.
In SPI 3-wire configuration CSB (chip select low active), SCK (serial clock), and SDI (serial data
input and output) pins are used. While SCK is high, the communication starts when the CSB is pulled
low by the SPI master and stops when CSB is pulled high. SCK is also controlled by SPI master. SDI
is driven (when used as input of the device) at the falling edge of SCK and should be captured (when
used as the output of the device) at the rising edge of SCK.
The protocol as such is the same in 3-wire configuration as it is in 4-wire configuration. The basic
operation wave-form (read or write access) for 3-wire configuration is depicted in the figure below: