Datasheet

Data Sheet
BMA456
BST-BMA456-DS000-01 | Version 1.1 | October 2017 Bosch Sensortec
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Note: Specifications within this document are subject to change without notice.
The following figure shows the definition of the SPI timings:
SPI timing diagram
The SPI interface of the BMA456 is compatible with two modes, ´00´ [CPOL = ´0´ and CPHA = ´0´]
and ´1[CPOL = ´1´ and CPHA = ´1´]. The automatic selection between ´00´ and ´1is controlled
based on the value of SCK after a falling edge of CSB.
Two configurations of the SPI interface are supported by the BMA456: 4-wire and 3-wire. The same
protocol is used by both configurations. The device operates in 4-wire configuration by default. It can
be switched to 3-wire configuration by writing IF_CONF.spi3 = 0b1. Pin SDI is used as the common
data pin in 3-wire configuration.
For single byte read as well as write operations, 16-bit protocols are used. The BMA456 also supports
multiple-byte read and write operations.
In SPI 4-wire configuration CSB (chip select low active), SCK (serial clock), SDI (serial data input),
and SDO (serial data output) pins are used. The communication starts when the CSB is pulled low by
the SPI master and stops when CSB is pulled high. SCK is also controlled by SPI master. SDI and
SDO are driven at the falling edge of SCK and should be captured at the rising edge of SCK.
The basic write operation waveform for 4-wire configuration is depicted in the following figure. During
the entire write cycle SDO remains in high-impedance state.
t
SDI_hold
t
SCKH
t
CSB_hold
t
CSB_setup
t
SDI_setup
t
SCKL
t
SDO_OD
CSB
SCK
SDI
SDO