Datasheet

Page 37 /
Confidential
BST-BMA400-DS000-00 | Version 0.1 | November 2017 Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to third parties.
BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice.
FIFO flushing
A FIFO flush operation is executed when a flush command is written to the CMD register, when a soft-
reset command is issued or when the device changes power mode and FIFO auto flush is enabled
through FIFO_CONFIG0.auto_flush bit. For system simplicity a flush is executed as soon as possible.
FIFO can be written or flushed at any time when FIFO is not read (FIFO_PWR_CONFIG.fifo_read_en
=‘0’)
Flush operation does not depend on serial interface activity to finish. Power mode transition (or write)
does not have to wait for the Flush to finish. Serial interface always reads what is in the FIFO at the
moment the next frame is prepared for the output buffer. Empty frames are read if the FIFO was flushed
during the transaction.
FIFO watermark interrupt
Watermark interrupt status is asserted when the watermark interrupt condition is satisfied i.e. when
the filling level of the FIFO (number of unread bytes in the FIFO) is greater or equal to the watermark
level (fifo_bytes_cnt<10:0> fifo_watermark<10:0>). When the FIFO watermark level is set to zero,
the interrupt condition is never satisfied. The status of the watermark interrupt can be read back
through the fwm_int bit.
Interrupt status is cleared by reading the fwm_int bit when the FIFO filling level is lower than the
watermark level. The watermark interrupt is propagated to INT1/2 pad only when it is enabled by
setting bit fwtm_en = ‘1’.
The interrupt is only evaluated after entire frames have been read out or written (as the counter is only
in-/decreased on a frame basis).
Watermark interrupt condition is also updated after the end of the serial interface (burst read)
transaction which wrote into the registers fifo_watermark<10:8> or fifo_watermark<7:0>.
The behavior of the FIFO watermark is shown in the figures below.
Confidential and under NDA
Seeed Studio
Confidential and under NDA
Seeed Studio
Confidential and under NDA