Datasheet

PSoC
®
4: PSoC 4000 Family
Datasheet
Document Number: 001-89638 Rev. *G Page 15 of 34
GPIO
Deep Sleep Mode, V
DD
= 3.6 to 5.5 V (Regulator on)
SID34 I
DD29
I
2
C wakeup and WDT on – 2.5 12 µA
Deep Sleep Mode, V
DD
= V
CCD
= 1.71 to 1.89 V (Regulator bypassed)
SID37 I
DD32
I
2
C wakeup and WDT on – 2.5 9.2 µA
XRES Current
SID307 I
DD_XR
Supply current while XRES asserted – 2 5 mA
Table 4. DC Specifications (continued)
Typical values measured at V
DD
= 3.3 V and 25 °C.
Spec ID# Parameter Description Min Typ Max Units
Details/
Conditions
Table 5. AC Specifications
Spec ID# Parameter Description Min Typ Max Units
Details/
Conditions
SID48 F
CPU
CPU frequency DC – 16 MHz 1.71 V
DD
5.5
SID49
[5]
T
SLEEP
Wakeup from Sleep mode – 0 – µs
SID50
[5]
T
DEEPSLEEP
Wakeup from Deep Sleep mode – 35 – µs
Notes
5. Guaranteed by characterization.
6. V
IH
must not exceed V
DD
+ 0.2 V.
Table 6. GPIO DC Specifications (referenced to V
DDIO
for 16-Pin QFN V
DDIO
pins)
Spec ID# Parameter Description Min Typ Max Units
Details/
Conditions
SID57 V
IH
[6]
Input voltage high threshold 0.7 × V
DD
–– VCMOS Input
SID58 V
IL
Input voltage low threshold – – 0.3 × V
DD
VCMOS Input
SID241 V
IH
[6]
LVTTL input, V
DD
< 2.7 V 0.7× V
DD
–– V
SID242 V
IL
LVTTL input, V
DD
< 2.7 V – – 0.3 × V
DD
V
SID243 V
IH
[6]
LVTTL input, V
DD
 2.7 V 2.0 – – V
SID244 V
IL
LVTTL input, V
DD
 2.7 V – – 0.8 V
SID59 V
OH
Output voltage high level V
DD
–0.6 – – V I
OH
= 4 mA at
3V V
DD
SID60 V
OH
Output voltage high level V
DD
–0.5 – – V I
OH
= 1 mA at
1.8 V V
DD
SID61 V
OL
Output voltage low level – – 0.6 V I
OL
= 4 mA at
1.8 V V
DD
SID62 V
OL
Output voltage low level – – 0.6 V I
OL
= 10 mA at
3V V
DD
SID62A V
OL
Output voltage low level – – 0.4 V I
OL
= 3mA at 3V
V
DD
SID63 R
PULLUP
Pull-up resistor 3.5 5.6 8.5 kΩ
SID64 R
PULLDOWN
Pull-down resistor 3.5 5.6 8.5 kΩ
SID65 I
IL
Input leakage current (absolute value) – – 2 nA 25 °C, V
DD
=
3.0 V
SID66 C
IN
Input capacitance – 3 7 pF