Datasheet

PSoC
®
4: PSoC 4000 Family
Datasheet
Document Number: 001-89638 Rev. *G Page 11 of 34
Note
3. Must not have load to ground during POR (should be an output).
Table 2. 16-ball WLCSP Pin Descriptions and Diagram
Pin Name TCPWM Signal
Alternate
Functions
Pin Diagram
B4 P3.2 OUT0:PWMOUT0 – Bottom View
Top View
C3 P0.2/TRIN2 TRIN2:Trigger Input 2 –
C4 P0.4/TRIN4/CMPO_0/
EXT_CLK
TRIN4:Trigger Input 4 CMPO_0: Sense
Comp Out, Ext.
Clock, CMOD Cap
D4 VCCD – –
D3 VDD – –
D2 VSS – –
C2 VDDIO – –
D1 P0.6 – –
C1 P1.1/OUT0 OUT0:PWMOUT0 –
B1 P1.2/SCL – I
2
C Clock
A1 P1.3/SDA – I
2
C Data
A2 P1.6/OVF0/UND0/nO
UT0/CMPO_0
nOUT0:Complement
of OUT0, UND0,
OVF0
CMPO_0: Sense
Comp Out, Internal
Reset function
[3]
B2 P1.7/MATCH/
EXT_CLK
MATCH: Match Out External Clock
A3 P2.0 – –
B3 P3.0/SDA/SWD_IO – I
2
C Data, SWD I/O
A4 P3.1/SCL/SWD_CLK – I
2
C Clock, SWD
Clock
4
D
C
B
A
321
4
D
C
B
A
321
PIN 1 DOT