Specifications

4.4 Cylinder Low register
CS1FX– = 1 DA2 = 1
CS3FX– = 0 DA1 = 0
DA0 = 0 Mode = Read/Write
PC-AT I/O port address: 1F4
H
This register contains the eight least significant bits of the starting cylinder
address for any disc access. At the completion of a command, this
register is updated to reflect the current cylinder address.
With logical block addressing, this register contains bits 15 through 8 of
the LBA.
4.5 Data register
CS1FX– = 1 DA2 = 0
CS3FX– = 0 DA1 = 0
DA0 = 1 Mode = Read/Write
PC-AT I/O port address: 1F0
H
This is the register through which:
• All data is passed during Read and Write commands.
• The sector table is transferred during format commands.
The host can only access this register when the DRQ bit in the status
register is set to 1. All transfers use 16-bit words, except the ECC bytes
transferred during Read Long and Write Long commands, which use 8
bit bytes.
4.6 Device Control register
CS1FX– = 0 DA2 = 1
CS3FX– = 1 DA1 = 1
DA0 = 0 Mode = Write Only
PC-AT I/O port address: 3F6
H
16 ATA Interface Reference Manual, Rev. C