Specifications

Hardware Description of LCN Node Processors
3.1 K2LCN-X Node Processor
3/96 Application Module
X
Service 15
Honeywell Inc.
K2LCN pinning
The K2LCN has an LCN node number pinning feature on the board itself.
This feature is duplicated on the CLCN A/B I/O (or LCN I/O) board which
is installed directly behind the K2LCN board in the A
X
M Five-slot chassis.
The K2LCN pinning requirement for the A
X
M is shown at the right. Notice
there are no jumpers.
ATTENTION
The address pinning jumpers must all be removed from the
K2LCN board when it is used in conjunction with an LCN I/O
board. The node number pinning must be done on the LCN I/
O board in this case.
40002
9D
9F
9H
9C
TS2
Jumper Removed = "1"
K2LCN
NOTE: This text is not on the board.
64
32
16
8
4
2
1
Binary
Weight
Parity
P
6 5 4 3 2 1 0