Specifications

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Field Service Handbook for SGI
Conlgurations
CPU Board
Crimson systems are configured with a single-processor IP17 CPU board, which is
configured with two different MIPS microprocessors. The microprocessor is
permanently mounted on the CPU board.
0 100MH~R4000
16 K primary cache (8 K datal8 K instruction)
1 MB secondary cache
0 15OMHZR4400
32 K primary cache (16 K datal16 K instruction)
1 MB secondary cache
CD Great Eastern Technology 11/96
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