Product manual

10 Barracuda 9FC Product Manual, Rev. C
4.2.3 General performance characteristics
4.3 Start/stop time
If the Motor Start option is disabled, the drive becomes ready within 30 seconds after DC power is applied. If a
recoverable error condition is detected during the start sequence, the drive executes a recovery procedure and
the time to become ready may exceed 30 seconds. During the start sequence, the drive responds to some
commands over the FC-AL interface. Stop time is less than 30 seconds (maximum) from removal of DC power.
If the Motor Start option is enabled, the internal controller accepts the commands listed in the
Fibre Channel
Interface Manual
less than 3 seconds after DC power has been applied. After the Motor Start command has
been received, the drive becomes ready for normal operations within 30 seconds (excluding the error recovery
procedure). The Motor Start command can also be used to command the drive to stop the spindle.
There is no power control switch on the drive.
4.4 Prefetch/multi-segmented cache control
The drive provides a prefetch/multi-segmented cache algorithm that in many cases can enhance system per-
formance. To select this feature the host sends the Mode Select command with the proper values in the appli-
cable bytes in page 08h. Default is prefetch and read cache enabled.
If the Prefetch feature is enabled, data in contiguous logical blocks on the disc immediately beyond that which
was requested by a Read command are retrieved and stored in the buffer for immediate transfer from the buffer
to the host on subsequent Read commands that request those logical blocks (this is true even if cache opera-
tion is disabled). To enable Prefetch, use Mode Select page 08h, byte 12, bit 5 (Disable Read Ahead - DRA
bit). DRA bit = 0 enables prefetch.
ST19171FC
Minimum sector interleave 1 to 1
Data buffer to/from disc media (512-byte logical block)
Data transfer rate (
≤
1 logical block), variable with zone/cylinder 80.0 Mbits/sec (minimum)*
124.4 Mbits/sec (maximum)*
Sustained transfer rate (across track and cylinder boundaries) 56.0 Mbits/sec (minimum)*
88.8 Mbits/sec (maximum)*
FC-AL interface data
Maximum instantaneous transfer rate 106.3 Mbytes/sec
Logical block sizes
Default is 512-byte data blocks
Variable (180- to 736-bytes) in multiples of four bytes and
768- to 4,096-byte in multiples of 32 bytes
Read/write consecutive sectors on a track
Ye s
Flaw reallocation performance impact (for flaws reallocated using the
spare logical blocks per track reallocation scheme)
Negligible
Flaw reallocation performance impact (for flaws reallocated using the
spare sectors per cylinder reallocation scheme)
8.33 msec (minimum)
16.67 msec (maximum)
Flaw reallocation performance impact (for flaws reallocated using the
spare logical blocks per volume reallocation scheme)
35 msec (typical)
Overhead time for head switch in sequential mode
0.8 msec
Overhead time for one track cylinder switch in sequential mode
1.2 msec (typical)
Average rotational latency
4.17 msec
*Assumes no errors and no relocated sectors.