SD Specifications Part 1 Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Revision History Date Version April 3, 2006 1.10 September 25, 2006 May 18, 2010 January 22, 2013 2.00 3.01 4.10 Changes compared to previous issue Physical Layer Simplified Specification Version 1.10 initial release. (Supplementary Notes Ver1.00 is applied.) Physical Layer Simplified Specification Version 2.00 Physical Layer Simplified Specification Version 3.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Release of SD Simplified Specification The following conditions apply to the release of the SD simplified specification ("Simplified Specification") by the SD Card Association. The Simplified Specification is a subset of the complete SD Specification which is owned by the SD Card Association.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Conventions Used in This Document Naming Conventions ● Some terms are capitalized to distinguish their definition from their common English meaning. Words not capitalized have their common English meaning. Numbers and Number Bases ● Hexadecimal numbers are written with a lower case "h" suffix, e.g., FFFFh and 80h.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Table of Contents 1. General Description ............................................................................................................ 1 2. System Features ................................................................................................................. 3 3. SD Memory Card System Concept ......................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.2.4.1 Initialization Sequence for UHS-I ............................................................................................ 30 4.2.4.2 Timing to Switch Signal Voltage .............................................................................................. 31 4.2.4.3 Timing of Voltage Switch Error Detection ..................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.7.3 Command Classes ............................................................................................................. 66 4.7.4 Detailed Command Description .......................................................................................... 69 4.7.5 Difference of SD Commands Definition in UHS-II .........................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.13.3.1 Speed Grade Parameters ................................................................................................... 106 4.13.3.1.1 UHS Speed Grade........................................................................................................ 106 4.13.3.1.2 AU (Allocation Unit) ........................................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7.3.2.9 Extension Register Set Address (4-byte for each) ......................................................... 140 5.7.4 Revision Management ...................................................................................................... 141 5.8 Application Specification on Function Extension .....................................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3 SPI Mode Transaction Packets ............................................................................................... 161 7.3.1 Command Tokens ............................................................................................................ 161 7.3.1.1 Command Format ....................................................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Table of Figures Figure 1-1: SD Specifications Documentation Structure ................................................................................. 1 Figure 3-1: A Blank in the Simplified Specification........................................................................................... 6 Figure 3-2: A Blank in the Simplified Specification.......................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Figure 4-29: A Blank in the Simplified Specification....................................................................................... 92 Figure 4-30 : A Blank in the Simplified Specification...................................................................................... 92 Figure 4-31: A Blank in the Simplified Specification.....................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Figure 6-3: A Blank in the Simplified Specification....................................................................................... 148 Figure 6-4: Power-up Diagram of Card ........................................................................................................ 149 Figure 6-5 : Power Up Diagram of Host ................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Table of Tables Table 3-1: SD Memory Card Pad Assignment ............................................................................................... 11 Table 3-2: SD Memory Card Registers .......................................................................................................... 12 Table 3-3 : UHS-II Interface Pad Assignment ............................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Table 4-42: Card Status Field/Command - Cross Reference ........................................................................ 86 Table 4-43: SD Status ................................................................................................................................... 87 Table 4-44: Speed Class Code Field ...................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Table F - 1 : Combination of Codes to Identify a Function Driver ................................................................
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 1. General Description SD Memory Card is a memory card that is specifically designed to meet the security, capacity, performance, and environment requirements inherent in newly emerging audio and video consumer electronic devices.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • Security Specification: The specification describes the content protection mechanism and the application-specific commands that support it. • Physical Layer Specification (this document): The specification describes the physical interface and the command protocol used by the SD Memory Card.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3. SD Memory Card System Concept Description here is a blank in the Simplified Specification. 3.1 Read-Write Property In terms of read-write property, two types of SD Memory Cards are defined: • Read/Write (RW) cards (Flash, One Time Programmable - OTP, Multiple Time Programmable - MTP).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.6 Bus Protocol 3.6.1 SD Bus Protocol Communication over the SD bus is based on command and data bit streams that are initiated by a start bit and terminated by a stop bit. • Command: a command is a token that starts an operation. A command is sent from the host either to a single card (addressed command) or to all connected cards (broadcast command).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 There are two types of Data packet format for the SD card. (1) Usual data (8-bit width): The usual data (8-bit width) are sent in LSB (Least Significant Byte) first, MSB (Most Significant Byte) last sequence. But in the individual byte, it is MSB (Most Significant Bit) first, LSB (Least Significant Bit) last.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 2. Data Packet Format for Wide Width Data (Ex. ACMD13) b511 b0 Ex. SD Status End bit Start bit Wide Width Data DAT0 Ex. [SD memory] ACMD13(SD Status), ACMD51(SCR), etc 0 b511 b510 b509 b508 ...
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.7 SD Memory Card–Pins and Registers 3.7.1 SD Bus Pin Assignment The SD Memory Card has the form factor 24 mm x 32 mm x 2.1 mm or 24 mm x 32 mm x 1.4 mm. 9 1 2 3 45 678 wp SD Memory Card Figure 3-11: SD Memory Card Shape and Interface (Top View) Figure 3-11 shows the general shape of Standard Size and interface contacts of the SD Memory Card.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Each card has a set of information registers (see also Chapter 5 in the Physical Layer Specification): Name Width CID 128 RCA1 16 DSR CSD 16 128 SCR 64 OCR 32 SSR 512 CSR 32 Description Card identification number; card individual number for identification (See 5.2). Mandatory.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.7.2 UHS-II Pin Assignment UHS-II Card shape is the same as SD Cards and UHS-II Interface is assigned to pads on the second row. 1 2 3 4 5 6 7 8 9 10 1112 13 14 1516 17 SD Memory Card Figure 3-13 : UHS-II Card Shape and Interface (Top View) Figure 3-13 shows the shape of Standard Size and interface contacts of the UHS-II SD Memory Card.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.8 ROM Card ROM Card is defined as read only memory which meets following requirements. A permanent or temporary write protected writable SD memory card does not belong to this category. 3.8.1 Register Setting Requirements Table 3-4 shows register setting requirements for ROM Card.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.9 Ultra High Speed Phase I (UHS-I) Card UHS-I provides up to 104MB/sec performance on 4-bit SD bus with the single end driver interface. Card form factor is the same and existing connector can be used. 3.9.1 UHS-I Card Operation Modes • DS - Default Speed up to 25MHz 3.3V signaling • HS - High Speed up to 50MHz 3.3V signaling • SDR12 - SDR up to 25MHz 1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 DS: Default Speed Mode HS: High Speed Mode DS UHS50 Card HS SDR12 SDR25 Signal Voltage 3.3V 1.8V SDR50 DDR50 DS UHS104 Card HS SDR12 SDR25 SDR50 SDR104 DDR50 12MB/s 25MB/s 50MB/s 104MB/s Throughput Figure 3-15 : UHS-I Card Type Modes of Operation versus Throughput 3.9.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.9.4 UHS-I Bus Speed Modes Selection Sequence Power on CMD0 CMD8 Once signal voltage is switched to 1.8V, the card continues 1.8V signaling regardless of CMD0. Power cycle resets the signal voltage to 3.3V. After Switching 1.8V singling, the card cannot be changed to SPI mode. Host requests card to change 1.8V signal voltage by ACMD41.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.9.5 UHS-I System Block Diagram This section is a blank in the Simplified Specification.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.9.6 Summary of Bus Speed Mode for UHS-I Card Table 3-6 shows the card requirements regarding Bus Speed modes selected by CMD6 function group 1. The maximum frequency and the maximum power are determined by CMD6. Bus Speed *1 Mode *2 Max. Bus Speed Max. Clock Frequency Signal Voltage Max. Power [W] [MB/s] [MHz] [V] SDR104 104 208 1.8 - SDR50 50 100 1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.10 Ultra High Speed Phase II (UHS-II) Card 3.10.1 UHS-II Card Operation Modes SD Bus Interface Modes • DS - Default Speed up to 25MHz 3.3V signaling • HS - High Speed up to 50MHz 3.3V signaling • SDR12 - SDR up to 25MHz 1.8V signaling • SDR25 - SDR up to 50MHz 1.8V signaling • SDR50 - SDR up to 100MHz 1.8V signaling • SDR104 - SDR up to 208MHz 1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.10.4 UHS-II Interface Selection Sequence UHS-II supported host shall support Legacy SD Bus Interface (I/F) and UHS-II I/F. Removable UHS-II card slot shall be connected to both I/Fs. Then UHS-II card may be initialized not only in UHS-II mode but also in SD Bus I/F mode. Figure 3-19 shows how to select UHS-II mode.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 3.10.5 Summary of Bus Speed Mode for UHS-II Card Max. Power*2 [W] Max. Bus Speed Max. Clock Frequency Signal Voltage [MB/s] [MHz] [V] SDSC*3 SDHC*4 SDXC*5 HD312 312 52 0.4 - 2.88*6 2.88*6 FD156 156 52 0.4 - 2.88*6 2.88*6 SDR104 104 208 1.8 - 2.88*6 2.88*6 SDR50 50 100 1.8 - 1.44 1.44 DDR50 50 50 1.8 - 1.44 1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4. SD Memory Card Functional Description 4.1 General All communication between host and cards is controlled by the host (master). The host sends commands of two types: broadcast and addressed (point-to-point) commands. • Broadcast commands Broadcast commands are intended for all cards. Some of these commands require a response.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.2 Card Identification Mode While in card identification mode the host resets all the cards that are in card identification mode, validates operation voltage range, identifies cards and asks them to publish Relative Card Address (RCA). This operation is done to each card separately on its own CMD line.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Figure 4-1 shows State Diagram of card Identification mode for SD I/F. In case of UHS-II mode, refer to SD-TRAN Section of the UHS-II Addendum.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.2.3 Card Initialization and Identification Process After the bus is activated the host starts card initialization and identification process (See Figure 4-2). The initialization process starts with SD_SEND_OP_COND (ACMD41) by setting its operational conditions and the HCS bit in the OCR.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Power-on CMD0 CMD8 No response Ver2.00 or later SD Memory Card(voltage mismatch) or Ver1.X SD Memory Card or not SD Memory Card No response Ver2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.2.3.1 Initialization Command (ACMD41) Followings are general rules of the argument of ACMD41: (1) If the voltage window field (bit 23-0) in the argument is set to zero, it is called "inquiry CMD41" that does not start initialization and is use for getting OCR. The inquiry ACMD41 shall ignore the other field (bit 31-24) in the argument.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.2.4 Bus Signal Voltage Switch Sequence 4.2.4.1 Initialization Sequence for UHS-I Figure 4-5 shows sequence of commands to perform voltage switch and Figure 4-6 shows initialization flow chart for UHS-I hosts. Red and yellow boxes are new procedure to initialize UHS-I card.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 When entering tran state, CARD_IS_LOCKED status in the R1 response should be checked (it is indicated in the response of CMD7). If the card is locked, CMD42 is required to unlock the card. If the card is unlocked, CMD42 can be skipped.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 is not required. The tuning command (CMD19) follows the timing of the single block read command as described in Figure 4-10.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3 Data Transfer Mode Until the end of Card Identification Mode the host shall remain at fOD frequency because some cards may have operating frequency restrictions during the card identification mode. In Data Transfer Mode the host may operate the card in fPP frequency range. The host issues SEND_CSD (CMD9) to obtain the Card Specific Data (CSD register), e.g.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Important Note: The card de-selection is done if certain card gets CMD7 with un-matched RCA. That happens automatically if selection is done to another card and the CMD lines are common.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.1 Wide Bus Selection/Deselection Wide Bus (4 bit bus width) operation mode may be selected/deselected using ACMD6. The default bus width after power up or GO_IDLE (CMD0) is 1 bit bus width. In order to change the bus width two conditions shall be met: a) The card is in 'tran state'. b) The card is not locked A locked card will responds to ACMD6 as illegal command. 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Table 4-4 defines the card behavior when a partial block accesses is enabled. If the misaligned block is the first data block of the command (i.e. ADDRESS_ERROR was reported in the actual response to the command), then no data is transferred and the card remains in the TRAN state.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 mode) will be ignored. Multiple block write command shall be used rather than continuous single write command to make faster write operation.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.5 Erase It is desirable to erase many write blocks simultaneously in order to enhance the data throughput. Identification of these write blocks is accomplished with the ERASE_WR_BLK_START (CMD32), ERASE_WR_BLK_END (CMD33) commands. The host should adhere to the following command sequence: ERASE_WR_BLK_START, ERASE_WR_BLK_END and ERASE (CMD38).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.7 Card Lock/Unlock Operation 4.3.7.1 General The password protection feature enables the host to lock a card while providing a password, which later will be used for unlocking the card. The password and its size are kept in a 128-bit PWD and 8-bit PWD_LEN registers, respectively. These registers are non-volatile so that a power cycle will not erase them.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 The following paragraphs define the various lock/unlock command sequences: • Setting the Password • • Select a card (CMD7), if not previously selected. Define the block length (CMD16), given by the 8-bit card lock/unlock mode, the 8-bits password size (in bytes), and the number of bytes of the new password.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 power on reset. An attempt to lock a locked card or to lock a card that does not have a password will fail and the LOCK_UNLOCK_FAILED error bit will be set in the status register, unless it was done during a password definition or change operations. • Unlocking the Card: • • Select a card (CMD7), if not previously selected.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.7.3 Forcing Erase In the case that the user forgot the password (the PWD content) it is possible to erase all the card data content along with the PWD content. This operation is called Forced Erase. • Select a card (CMD7), if not previously selected already. • Define the block length (CMD16) to 1 byte (8-bit card lock/unlock command).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.7.4 Relation Between ACMD6 and Lock/Unlock State ACMD6 is rejected when the card is locked and bus width can be changed only when the card is unlocked. Table 4-9 shows the relation between ACMD6 and the Lock/Unlock state.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.7.6 Two Types of Lock/Unlock Card There are two types of lock/unlock function-supported cards. The Type 1 is the earlier version of SD Memory Card and the Type 2 is defined in the Physical Layer Specification Version 1.10 and higher. Table 4-10 shows the difference between these types of cards. The SD memory cards that support Lock/Unlock and comply with Version 1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.9 Application-Specific Commands 4.3.9.1 Application-Specific Command – APP_CMD (CMD55) This command, when received by the card, causes the card to interpret the following command as an application-specific command, ACMD. The ACMD provides command extension, has the same structure as that of regular commands and it may have the same CMD number.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.10 Switch Function Command 4.3.10.1 General Switch function command (CMD6) is used to switch or expand memory card functions. Currently four function groups are defined: (1) Access Mode: Selection of SD bus interface speed modes. (2) Command System: A specific function can be extended and controlled by a set of shared commands.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.10.2 Mode 0 Operation - Check Function CMD6 mode 0 is used to query which functions the card supports, and to identify the maximum current/power consumption of the card under the selected functions. Refer to Table 4-31: Switch function commands (class 10) for the argument definition of CMD6.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Arg. Slice Group No. [23:20] 6 [19:16] 5 Function name reserved reserved [11:8] 3 Driver Strength [7:4] 2 Command system [3:0] 1 Access mode*1 Default*2 Type B Type A Default*2 Default*2 / SDR12 High-Speed / SDR25 SDR50 SDR104 DDR50 0x1 Reserved Reserved Default*2 0.72W 1.44W 0x2 0x3 0x4 Reserved Reserved Reserved Reserved Reserved Reserved 2.16W 2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 according to host power supply capability. For SDIO Combo Cards, refer to SDIO specification to set the total card power consumable. The Power Limit is defined in accordance with the Mechanical Addenda that define thermal requirements as a function of total card power consumption. This Function Group is used for any bus mode including UHS-I and UHS-II modes.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Application Notes: Default setting is 0.72W. In this mode, UHS-I and UHS-II card may not provide the maximum performance. The Speed Grade performance is defined at 1.44W mode. The maximum performance of the card is available when setting of this field covers the maximum current (power) of the card that can be read by CMD6 mode 0.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.10.4 Switch Function Status The switch function status is the returned data block that contains function and current consumption information. The block length is predefined to 512 bits and the use of SET_BLK_LEN command is not necessary. Table 4-13 describes the status data structure. The status bits of the response contain the information of the function group.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Bits Description Width 495:480 Support Bits of Functions in Function Group 6 Each bit corresponds to a function. Function 15 and 0 are always enabled. 16 If a bit 480+i is set, function i is supported (i = Function 15 to 0) 479:464 Support Bits of Functions in Function Group 5 Each bit corresponds to a function. Function 15 and 0 are always enabled.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Bits Description 335:320 Reserved for Busy Status of functions in group 4 If bit [i] is set, function [i] is busy. This field can be read in mode 0 and mode 1 319:304 Reserved for Busy Status of functions in group 3 If bit [i] is set, function [i] is busy.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Argument 0 Busy Status Status Code Don't Care 0 Ready =Arg. Busy Current Selected Don't Care Fh Supported function Not Supported function Fh Current Status indicates current selected function Selected Table 4-15: Status Code of Mode 0 to Supported Function Group Don't Care Argument 0 Busy Status Status Code Don't Care 0 Ready =Arg.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.10.5 Relationship between CMD6 Data and Other Commands This section is a blank in the Simplified Specification. Figure 4-16: A Blank in the Simplified Specification Figure 4-17: A Blank in the Simplified Specification 4.3.10.6 Switch Function Flow Example This section is a blank in the Simplified Specification.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.11 High-Speed Mode (25 MB/sec interface speed) Although the Rev 1.01 SD memory card supports up to 12.5 MB/sec interface speed, the speed of 25 MB/sec is necessary to support increasing performance needs of the host and because memory size continues to grow.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.13 Send Interface Condition Command (CMD8) CMD8 (Send Interface Condition Command) is defined to initialize SD Memory Cards compliant to the Physical Layer Specification Version 2.00 or later. CMD8 is valid when the card is in Idle state. This command has two functions. • • Voltage check: Checks whether the card can operate on the host supply voltage.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.14 Command Functional Difference in Card Capacity Types CCS in the response of ACMD41 determines card capacity types: CCS=0 is SDSC and CCS=1 is SDHC or SDXC. Memory access commands include block read commands (CMD17, CMD18), block write commands (CMD24, CMD25), and block erase commands (CMD32, CMD33).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.4 Clock Control The SD Memory Card bus clock signal can be used by the host to change the cards to energy saving mode or to control the data flow (to avoid under-run or over-run conditions) on the bus. The host is allowed to lower the clock frequency or shut it down.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.5 Cyclic Redundancy Code (CRC) The CRC is intended to protect SD Memory Card commands, responses, and data transfer against transmission errors on the SD Memory Card bus. One CRC is generated for every command and checked for every response on the CMD line. For data blocks, one CRC per transferred block is generated.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • CRC16 In the case of one DAT line usage, the CRC16 is used for payload protection in block transfer mode. The CRC check sum is a 16-bit value and is computed as follows: Generator polynomial G(x) = x16 +x12 +x5 +1 M(x) = (first bit) * xn + (second bit)* xn-1 +...+ (last bit) * x0 CRC[15...
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.6 Error Conditions 4.6.1 CRC and Illegal Command All commands are protected by CRC (cyclic redundancy check) bits. If the addressed card's CRC check fails, the card does not respond and the command is not executed. The card does not change its state, and COM_CRC_ERROR bit is set in the status register.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 d) Busy indication at block gap in multiple block write is up to 250ms except a following case. When the card executes consecutive two blocks write (2*512Bytes) and it spans across the physical block boundary, the busy after the each block can be indicated up to 500ms.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.7 Commands SD Commands applicable to UHS-II are defined in the UHS-II Addendum. 4.7.1 Command Types There are four kinds of commands defined to control the SD Memory Card: • Broadcast commands (bc), no response - The broadcast feature is only if all the CMD lines are connected together in the host.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.7.4 Detailed Command Description The following tables describe in detail all SD Memory Card bus commands. The responses R1-R3, R6 are defined in Chapter 4.9. The registers CID, CSD and DSR are described in Chapter 5. The card shall ignore stuff bits and reserved bits in an argument.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 CMD INDEX CMD15 type ac argument [31:16] RCA [15:0] reserved bits resp - abbreviation GO_INACTIVE_ STATE command description Sends an addressed card into the Inactive State. This command is used when the host explicitly wants to deactivate a card. Reserved bits shall be set to '0'.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 CMD INDEX type argument CMD22 reserved CMD23 ac [31:0] Block Count resp R1 abbreviation command description SET_BLOCK_COUNT Specify block count for CMD18 and CMD25. 1) The data transferred shall not cross a physical block boundary unless READ_BLK_MISALIGN is set in the CSD.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 CMD INDEX type argument resp abbreviation command description CMD28 ac [31:0] data 2 address R1b SET_WRITE_PROT If the card has write protection features, this command sets the write protection bit of the addressed group. The properties of write protection are coded in the card specific data (WP_GRP_SIZE). SDHC and SDXC Cards do not support this command.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 CMD INDEX type argument resp abbreviation command description CMD16 ac [31:0] block length R1 SET_BLOCKLEN See description in Table 4-23 CMD40 adtc Defined by DPS Spec. R1 Defined by DPS Spec. Single block read type. Available even if card is locked.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 ACMD INDEX type argument ACMD1-5 Reserved ACMD6 ac ACMD7-12 Reserved ACMD13 adtc [31:2] stuff bits [1:0]bus width [31:0] stuff bits resp abbreviation command description R1 SET_BUS_WIDTH Defines the data bus width ('00'=1bit or '10'=4 bits bus) to be used for data transfer. The allowed data bus widths are given in SCR register.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.7.5 Difference of SD Commands Definition in UHS-II Table 4-33 shows the difference of SD commands definition when the card is in UHS-II mode. SD-TRAN driver of host should manage the difference of SD commands functions. Not supported commands should not issue to UHS-II card. CMD13 shall not be issued during data transfer.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.8 Card State Transition Table Table 4-34 defines the card state transitions depend on the received command. State name in the table is the next state after the command is executed. "-" indicated that the command is treated as illegal command. In addition, whether a command is executable depends on command class (CCC).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.9 Responses All responses are sent via the command line CMD. The response transmission always starts with the left bit of the bit string corresponding to the response codeword. The code length depends on the response type. A response always starts with a start bit (always 0), followed by the bit indicating the direction of transmission (card = 0).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.9.4 R3 (OCR register) Code length is 48 bits. The contents of the OCR register are sent as a response to ACMD41. Bit position Width (bits) Value 47 1 '0' Description start bit 46 [45:40] [39:8] 1 6 32 '0' '111111' x transmission reserved OCR register bit Table 4-37: Response R3 [7:1] 7 '1111111' 0 1 '1' reserved end bit 4.9.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.9.6 R7 (Card interface condition) Code length is 48 bits. The card supported voltage information of 3.3V range power pin is sent by the response of CMD8. Bits 19-16 indicate the voltage range that the card supports. The card that accepted the supplied voltage returns R7 response.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.10 Two Status Information of SD Memory Card The SD Memory Card supports two status fields as follows: - 'Card Status': Error and state information of a executed command, indicated in the response - 'SD Status': Extended status field of 512 bits that supports special features of the SD Memory Card and future Application-Specific features. 4.10.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Bits Identifier Type Value Description Clear Condition 31 OUT_OF_RANGE E R X '0'= no error '1'= error The command's argument was out C of the allowed range for this card. 30 ADDRESS_ERROR E R X '0'= no error '1'= error A misaligned address which did not C match the block length was used in the command.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Bits Identifier Type Value Description Clear Condition 14 CARD_ECC_DISABLED SX '0'= enabled '1'= disabled The command has been executed without using the internal ECC.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 For each command responded by R1 response, following table defines the affected bits in the status field. An 'x' means the error/status bit may be set in the response to the respective command.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.10.2 SD Status The SD Status contains status bits that are related to the SD Memory Card proprietary features and may be used for future application-specific usage. The size of the SD Status is one data block of 512 bit. The content of this register is transmitted to the Host over the DAT bus along with a 16-bit CRC.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • SIZE_OF_PROTECTED_AREA Setting this field differs between SDSC and SDHC/SDXC. In case of SDSC Card, the capacity of protected area is calculated as follows: Protected Area = SIZE_OF_PROTECTED_AREA_* MULT * BLOCK_LEN. SIZE_OF_PROTECTED_AREA is specified by the unit in MULT*BLOCK_LEN.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • AU_SIZE This 4-bit field indicates AU Size and the value can be selected from 16 KB. AU_SIZE Value Definition 0h Not Defined 1h 16 KB 2h 32 KB 3h 64 KB 4h 128 KB 5h 256 KB 6h 512 KB 7h 1 MB 8h 2 MB 9h 4 MB Ah 8 MB Bh 12 MB Ch 16 MB Dh 24 MB Eh 32 MB Fh 64 MB Table 4-46: AU_SIZE Field The maximum AU size, depends on the card capacity, is defined in Table 4-47.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • ERASE_TIMEOUT This 6-bit field indicates the TERASE and the value indicates erase timeout from offset when multiple AUs are erased as specified by ERASE_SIZE. The range of ERASE_TIMEOUT can be defined as up to 63 seconds and the card manufacturer can choose any combination of ERASE_SIZE and ERASE_TIMEOUT depending on the implementation.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • UHS_SPEED_GRADE This 4-bit field indicates the UHS mode Speed Grade. Reserved values are for future speed grades larger than the highest defined value. Host shall treat reserved values (undefined) as highest grade defined.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.12 Timings This section is a blank in the Simplified Specification.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.13 Speed Class Specification The Speed Class Specification classifies card performance by Speed Class number and offers a method to calculate performance. The specification enables the host to support AV applications to perform real time recording to an SD memory card. The following sections describe the Speed Class specification for the card.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.13.1.2 Recording Unit (RU) Each AU is divided into units called "Recording Unit (RU)" (Refer to Figure 4-47). The unit of RU Size (SRU) is 16KBye. The RU Size is a multiple of 16KByte and shall not span across an AU boundary. Larger RU size may improve performance. The condition and requirement of the minimum RU Size is defined by Section 4.13.1.8.1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Application Notes: Performance may increase when larger data is written by one multiple write command. Therefore, the host may use larger RU sizes and transfer multiple RUs with one multiple-write command. 4.13.1.4 Read Performance Two kinds of read performances are defined. It is possible to insert either type of read operation during write operations.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 The ratio of used RU (r) is defined as: r= Nu , N RU Nu = rN RU The range of r is 0 to 1. (1 – r) means ratio of free RU, r=0 means all RUs are free. r=1 means all RUs are used and performance indicates zero at this point. By using r, Equation (1) is transformed into Equation (3). Performance Curve: P (r ) = (1 − r ) PwPm rPw + (1 − r ) Pm (0 ≤ r ≤ 1) ..............
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.13.1.7.1 Measurement Condition to determine Average TFw The equation (4) defines Average FAT Write Time (TFW(ave.)), which is the maximum sliding average of 8 times FAT write cycles. 8 Average FAT Write Time: TFW ( ave.) = max(∑ TFW (i )) i =1 8 ...............................................(4) 4.13.1.7.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Pw min. Pm min. Pr min. TFW (ave.) TFW (max.) TFR (4KB) [MB/sec] [MB/sec] [MB/sec] [ms] [ms] max. [ms] Class 2 2 1 2 100 750 12*1 Class 4 4 2 4 100 750 12*1 Class 6 6 3 6 100 750 12*1 Class 10 10 0*2 10 100 750 12*1 Note 1: TFR(4KB) value is changed in Version 3.00 Note 2: Even Class 10 card, Pm may be used for Class 2 to 6 operations by host.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.13.2 Speed Class Specification for SDXC Speed Class is defined for SDXC. Though the basic concept is similar to Speed Class for SDSC and SDHC, there are several differences. Key features of SDXC Speed Class are listed below. (1) The table of valid AU sizes is updated with five values larger than 4MB.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 AU (Multiple of 4MB) ... Memory area in the card RU ... 4MB 4MB 4MB Speed Class host writes sequentially in an AU in unit of RU ... Pw1 Pw2 Pw3 PwN Performance is measured over each 4MB boundary.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • • If a host tries to protect recorded data from any error including power failure, it may update CI frequently. A cluster is allocated to store CI and when it is filled, a new cluster is allocated. The first update of CI in a stream recording may be written from any point in an existing cluster.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.13.2.7.2 Requirements of the Performance Parameters for Each Speed Class Table 4-59 identifies the requirement of the parameters for each class under measurement conditions. Pw min. Pm min. Pr min. TFW (ave.) TFW (max.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Support of CMD20 is mandatory for SDXC card and optional for SDHC card. SDXC cards can meet Class performance when data is written after receiving CMD20 indicating the Start Recording function. SDHC cards can meet Class performance without CMD20. 4.13.2.8.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 by CMD20 Update CI) Even if the write data size after CMD20 Update CI is wrong (larger than 512-byte), the card accepts data writes without error but Speed Class performance is not maintained. The SDXC Speed Class host shall issue CMD20 Update DIR before CMD20 Start Recording so that the card can distinguish DIR and CI properly.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.13.3 Speed Grade Specification for UHS-I and UHS-II 4.13.3.1 Speed Grade Parameters 4.13.3.1.1 UHS Speed Grade Following grades are defined and indicated by UHS_SPEED_GRADE in SD Status. Speed Grade may be supported in SDHC and SDXC. In case of UHS-II card supports Speed Grade 1, both UHS-I mode and UHS-II mode shall support Speed Grade 1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.13.3.3 Speed Grade Measurement Conditions Speed Grades Measurement Conditions are defined in Table 4-60. Item Pw Measurement Conditions for UHS-I Definition Performance is measured the same as Pw under following conditions. SDCLK=80MHz for SDR and 40MHz for DDR RU=512KB, Power Limit=1.44W (400mA at 3.6V) An AU Size is used described in UHS_AU_SIZE (Up to 64MB).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.14 Erase Timeout Calculation This chapter provides the guideline for long erase and a method to calculate erase timeout value. 4.14.1 Erase Unit The Speed Class Specification defines a new management unit of AU (Allocation Unit). Erase timeout calculation is defined as the basis of AU.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 The line B illustrated in Figure 4-57 shows another example of erase characteristics. The red line indicates the erase timeout value that the host should use. Since the time-out is bigger than 1 second, the red line and line B are equivalent. Erase time of an AU shall be less than 3 second. TOFFSET is mainly used to adjust erase timeout of an AU.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.15 Set Block Count Command CMD12 has been used to stop multiple-block Read / Write operation. However, CMD12 is timing dependent and it is difficult to control timing to issue CMD12 at exact timing. As UHS104 card has large delay variation between clock and data, CMD23 is useful for the host to stop multiple read / write operation instead of CMD12.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5. Card Registers Six registers are defined within the card interface: OCR, CID, CSD, RCA, DSR and SCR. These can be accessed only by corresponding commands (see Chapter 4.7). The OCR, CID, CSD and SCR registers carry the card/content specific information, while the RCA and DSR registers are configuration registers storing actual configuration parameters.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 OCR bit position 0-3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 243 25-28 29 30 31 1) 2) 3) OCR Fields Definition reserved reserved reserved reserved Reserved for Low Voltage Range reserved reserved reserved reserved reserved reserved reserved 2.7-2.8 2.8-2.9 2.9-3.0 3.0-3.1 3.1-3.2 3.2-3.3 3.3-3.4 3.4-3.5 3.5-3.6 Switching to 1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.2 CID register The Card IDentification (CID) register is 128 bits wide. It contains the card identification information used during the card identification phase. Every individual Read/Write (RW) card shall have a unique identification number.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • MDT The manufacturing date is composed of two hexadecimal digits, one is 8 bits representing the year(y) and the other is 4 bits representing the month (m). The "m" field [11:8] is the month code. 1 = January. The "y" field [19:12] is the year code. 0 = 2000. As an example, the binary value of the Date field for production date "April 2001" will be: 00000001 0100.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.3.2 CSD Register (CSD Version 1.0) Name Field Width Value CSD structure CSD_STRUCTURE 2 00b reserved 6 00 0000b data read access-time-1 TAAC 8 xxh data read access-time-2 in CLK NSAC 8 xxh cycles (NSAC*100) max. data transfer rate TRAN_SPEED 8 32h or 5Ah card command classes CCC 12 01x110110101b max.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 The following sections describe the CSD fields and the relevant data types. If not explicitly defined otherwise, all bit strings are interpreted as binary coded numbers starting with the left bit first. • TAAC Defines the asynchronous part of the data access time.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • CCC The SD Memory Card command set is divided into subsets (command classes). The card command class register CCC defines which command classes are supported by this card. A value of 1 in a CCC bit means that the corresponding command class is supported. For command class definitions, refer to Table 4-21. CCC bit Supported card command class 0 class 0 1 class 1 ......
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • DSR_IMP Defines if the configurable driver stage is integrated on the card. If set, a driver stage register (DSR) shall be implemented (also see Chapter 5.5).
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • C_SIZE_MULT This parameter is used for coding a factor MULT for computing the total device size (see 'C_SIZE'). The factor MULT is defined as 2C_SIZE_MULT+2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • SECTOR_SIZE The size of an erasable sector. The content of this register is a 7-bit binary coded value, defining the number of write blocks (see WRITE_BL_LEN). The actual size is computed by increasing this number by one. A value of zero means one write block, 127 means 128 write blocks. • WP_GRP_SIZE The size of a write protected group.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • FILE_FORMAT_GRP Indicates the selected group of file formats. This field is read-only for ROM. The usage of this field is shown in Table 5-15 (Refer to FILE_FORMAT). • COPY Defines whether the contents is original (=0) or has been copied (=1). Setting this bit to 1 indicates that the card content is a copy. The COPY bit is a one time programmable bit except ROM card.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.3.3 CSD Register (CSD Version 2.0) Table 5-16 shows Definition of the CSD Version 2.0 for the High Capacity SD Memory Card and Extended Capacity SD Memory Card. The following sections describe the CSD fields and the relevant data types for SDHC and SDXC Cards. CSD Version 2.0 is applied to SDHC and SDXC Cards.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • TAAC This field is fixed to 0Eh, which indicates 1 ms. The host should not use TAAC, NSAC, and R2W_FACTOR to calculate timeout and should uses fixed timeout values for read and write operations (See 4.6.2). • NSAC This field is fixed to 00h. NSAC should not be used to calculate time-out values.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 The Minimum user area size of SDXC Card is 67,108,864 sectors (32GB). The Minimum value of C_SIZE for SDXC in CSD Version 2.0 is 00FFFFh (65535). • ERASE_BLK_EN This field is fixed to 1, which means the host can erase one or multiple units of 512 bytes. • SECTOR_SIZE This field is fixed to 7Fh, which indicates 64 KBytes. This value is not related to erase operation.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.4 RCA register The writable 16-bit relative card address register carries the card address that is published by the card during the card identification. This address is used for the addressed host-card communication after the card identification procedure. The default value of the RCA register is 0x0000.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • SD_SPEC, SD_SPEC3, SD_SPEC4 The Physical Layer Specification Version is indicated in combination with SD_SPEC, SD_SPEC3 and SD_SPEC4 as described Table 5-19. SD_SPEC SD_SPEC3 SD_SPEC4 Physical Layer Specification Version Number 0 1 2 2 2 0 0 0 1 1 Others 0 0 0 0 1 Version 1.0 and 1.01 Version 1.10 Version 2.00 Version 3.0X Version 4.XX reserved (1) Version 2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • Essential conditions to indicate Version 4.XX Card (SD_SPEC=2, SD_SPEC3=1 and SD_SPEC4=1) (1) Same as the essential conditions of Version 3.00 device (2) Support any of additional functions defined by Version 4.XX: Followings functions (a) to (c) are defined by Version 4.00.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 • SD_BUS_WIDTHS Describes all the DAT bus widths that are supported by this card.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7 Function Extension Specification There are demands for adding extension functions in the SD Memory Card. With regard to CMD6, it is not suitable for active control but suitable for selecting one of functions at initialization. Then new function extension method suitable for active control is introduced. Extension Register is introduced to control extension functions.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7.2 Extension Register Commands 5.7.2.1 Extension Register Read Command (Single Block) Figure 5-4 shows definition of Read Extension Register Single Block Command (CMD48). Bus timing of this command is equivalent to a single block read command (CMD17). The response type is R1. Data block length is fixed to 512-byte length.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 the end bit of CMD48 is 1 second. CMD48 CMD R1 DAT[3:0] 512-Byte LEN CRC Non Effective Data (don't care) ADDR, FNO, LEN Extension Register ADDR Effective Data to be read LEN Figure 5-5 : Extension Register Read Operation by CMD48 Extension Register can be used to interface a function device.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7.2.2 Extension Register Write Command (Single Block) Figure 5-7 shows definition of Write Extension Register Single Block Command (CMD49). Bus timing of this command is equivalent to a single block write command (CMD24). The response type is R1. Data block length is fixed to 512-byte length.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 LEN/MASK: Effective Length of a Page On accessing Data Port, card ignores this field but host shall set this field to 000h. If access is not to Data Port, meaning of this field is dependent on MW. If MW=0, this field is used for setting effective data length (byte unit) in a page.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 CMD CMD49 R1 CRC Status DAT[3:0] 512-Byte CRC 0xxx1 Busy Addr, FNO Addr 1 byte Function Device Data Port A byte register field is assigned as Write Data Port Write Data Port Figure 5-9 : Data Port Write Operation by CMD49 5.7.2.3 Multiple Block Data Transfer Multi-block data transfer can be supported by using CMD58/59.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7.2.4 Extension Register Read Command (Multi-Block) CMD58 is assigned as Read Multi-Block Command as shown in Figure 5-10. BUS and BUC are explained in Section 5.7.2.3 and the definition of other fields is equivalent to CMD48 in Section 5.7.2.1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7.2.5 Extension Register Write Command (Multi-Block) CMD59 is assigned for Write Multi-Block Command as shown in Figure 5-12. BUS and BUC are explained in Section 5.7.2.3 and the definition of other fields is equivalent to CMD49 in Section 5.7.2.2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7.2.6 Error Status Indication On detecting Illegal Command Error or Command CRC Error, the card indicates the error to the next R1 response. Backend errors of Extension Functions (ex. network error of I/O function, etc.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7.3 General Information Extended Function is supposed to be controlled by a Function Driver on a host system. Host Driver is responsible to find and load the pre-installed Function Driver to use a function on a SD card. Host System can use any function by this method. General Information is defined to realize Plug & Play in Host System.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Header Ext. 1 ...... Ext. 2 Ext.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.7.3.2.2 Function Capability Code (FCC 2-byte) Host Driver uses this field to select one of Standard Function Drivers when different types of Standard Function Drivers exist to a Standard Function Code. Function Specification may define options in this field to distinguish driver types. How to use this field is up to host system implementation.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 31-22 21-18 17 16-00 10-bit 4-bit 1-bit 17-bit Reserved (0000000000b) FNO 0 Start Address of a Register Set Bit 21-18: 4-bit FNO for Memory Space Bit 21-19: 3-bit FNO for I/O Space. (Bit 18=0). Table 5-24 : Field Definition of Extension Register Set Address Refer to Appendix F.1 about how to identify Function Driver. 5.7.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 5.8 Application Specification on Function Extension All application specifications defined in this section are assigned to Memory Extension Register Space. Assignment of Standard Function Code for memory is managed by Table 5-25. Function Name Standard Function Code Power Management Function 0001h Table 5-25 : Standard Function Code Assignment Table 5.8.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Bit Position Field Name Value 7 Rsv 0 6 Rsv 0 5 Rsv 0 4 Rsv 0 3 2 1 Revision 0000b 0 Revision of Power Management Register Set 0000b: The first revision others: Reserved Figure 5-16 : Power Management Revision Register Figure 5-17 shows Power Management Status register. Three supports bits of Power Manage Functions are defined in the upper 4-bit field.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Bit Position Field Name Value 7 Rsv 0 6 Rsv 0 5 Rsv 0 4 Rsv 0 3 Rsv 0 2 PDMN x 1 PSUN x 0 POFN x Power Off Notification 0: Normal Operation 1: Power Off Request Power Down Mode Notification 0: Normal Operation 1: Power Down Request If PDMS=1, this bit may be set to 1. Setting this bit lets a card go into Power Down Mode.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 (POFR=1). (5) If POFR=1, host shuts down the card power Once POFN is set to 1, power cycle and re-initialization are required to use the card again. 5.8.1.4 Power Sustenance Figure 5-20 shows flow chart to control Power Sustenance. If host set PSUN to 1, card should set PSUR to 1 within 1 second of CMD49 busy period.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Application Notes for Host designers 1) Once enabling Power Sustenance, Host shall use Power Off Notification sequence to shut down card power. Card power supply control by monitoring open/close the slot cover is one of possible safe solutions while in Power Sustenance to avoid sudden card removal.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 6. SD Memory Card Hardware Interface A part of this section is not described. Figure 6-1: Bus Circuitry Diagram 6.1 Hot Insertion and Removal This section is a blank in the Simplified Specification. 6.2 Card Detection (Insertion/Removal) This section is a blank in the Simplified Specification. 6.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 6.4 Power Scheme The power scheme of the SD Memory Card bus is handled locally in each SD Memory Card and in the host. 6.4.1 Power Up Sequence for SD Bus Interface 6.4.1.1 Power Up Time of Card A device shall be ready to accept the first command within 1ms from detecting VDD min. Device may use up to 74 clocks for preparation before receiving the first command.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 6.4.1.2 Power Up Time of Host Reset level is not described in Figure 6-4 of the Physical Layer Specification Version 2.00. Change of Figure 6-5 is applied to Figure 6-4 of the Physical Layer Specification. Host needs to keep power line level less than 0.5V and more than 1ms before power ramp up. VDD Supply Voltage 3.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 6.4.2 Power Up Sequence for UHS-II Interface 6.4.2.1 Power Up Sequence of UHS-II Card Figure 6-6 shows power up sequence for UHS-II Card. Either power up order of VDD1 and VDD2 should be expected and card power up is dependent on later one. UHS-II Card shall be ready to start PHY Initialization within 1ms from detecting later of VDD1 min or VDD2 min.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 6.5 Programmable Card Output Driver (3.3V Single End) (Optional) This section is a blank in the Simplified Specification. 6.6 Bus Operating Conditions for 3.3V Signaling This section is a blank in the Simplified Specification. 6.7 Driver Strength and Bus Timing for 1.8V Signaling This section is a blank in the Simplified Specification. 6.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7. SPI Mode 7.1 Introduction The SPI mode consists of a secondary communication protocol that is offered by Flash-based SD Memory Cards. This mode is a subset of the SD Memory Card protocol, designed to communicate with a SPI channel, commonly found in Motorola's (and lately a few other vendors') microcontrollers.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Power on In SD Bus mode from any state except Inactive SPI Operation Mode CMD0+ CS Asserted("0") In SPI mode from any state CMD0 It is mandatory for the host compliant to Physical Spec Version 2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Power-on CMD0+ CS Asserted("0") Not Mandatory to send CMD58: Though it is recommended to be done in order to get the supported voltage range of the card. Cards with non compatible voltage range Unusable Card Illegal Command CMD8 Card returns response without illegal command Ver2.00 or later SD Memory Card Ver1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.2.2 Bus Transfer Protection Every SD Card command transferred on the bus is protected by CRC bits. In SPI mode, the SD Memory Card offers a CRC ON mode which enables systems built with reliable data links to exclude the hardware or firmware required for implementing the CRC generation and verification functions.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 In the case of a data retrieval error, the card will not transmit any data. Instead, a special data error token will be sent to the host. Figure 7-4 shows a data read operation that terminated with an error token rather than a data block.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 In a Multiple Block write operation, the stop transmission will be done by sending 'Stop Tran' token instead of 'Start Block' token at the beginning of the next block. In case of Write Error indication (on the data response) the host shall use SEND_NUM_WR_BLOCKS (ACMD22) in order to get the number of well written write blocks.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.2.6 Read CID/CSD Registers Unlike the SD Memory Card protocol (where the register contents is sent as a command response), reading the contents of the CSD and CID registers in SPI mode is a simple read-block transaction. The card will respond with a standard response token (Refer to Figure 7-3) followed by a data block of 16 bytes suffixed with a 16-bit CRC.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.2.12 Content Protection Command All the special Content Protection ACMDs and security functionality related to the CPRM is the same as SD mode. 7.2.13 Switch Function Command Same as for SD mode with two exceptions: • The command is valid under the "not idle state". • The switching period is within 8 clocks after the end bit of the R1 response of CMD0. 7.2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3 SPI Mode Transaction Packets 7.3.1 Command Tokens 7.3.1.1 Command Format All the SD Memory Card commands are 6 bytes long. The command transmission always starts with the left most bit of the bit string corresponding to the command codeword. All commands are protected by a CRC (see Chapter 4.5). The commands and arguments are listed in Table 7-3.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3.1.3 Detailed Command Description The following table provides a detailed description of the SPI bus commands. The responses are defined in Chapter 7.3.2. Table 7-3 lists all SD Memory Card commands. A "yes" in the SPI mode column indicates that the command is supported in SPI mode. With these restrictions, the command class description in the CSD is still valid.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 CMD INDEX CMD89 CMD9 CMD10 CMD11 CMD12 CMD13 CMD14 CMD15 CMD16 CMD17 CMD18 CMD19 CMD20 CMD21...
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 CMD INDEX CMD55 SPI Argument Mode Yes [31:0] stuff bits Resp R1 Abbreviation Command Description APP_CMD Defines to the card that the next command is an application specific command rather than a standard command CMD56 Yes [31:1] stuff bits.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 The following table describes all the application specific commands supported/reserved by the SD Memory Card. All the following commands shall be preceded with APP_CMD (CMD55). CMD INDEX ACMD6 ACMD13 SPI Argument Mode No yes [31:0] stuff bits R2 SD_STATUS Send the SD Status.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3.1.4 Card Operation for CMD8 in SPI mode In SPI mode, the card always returns response. Table 7-5 shows the card operation for CMD8.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3.2 Responses There are several types of response tokens. As in SD mode, all are transmitted MSB first. Multiple bytes responses are defined in SPI mode but the card outputs only first byte (equivalent to R1) when Illegal Command Error or Command CRC Error is indicated in it. In this case, host never reads as the multiple bytes of response. 7.3.2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3.2.3 Format R2 This response token is two bytes long and sent as a response to the SEND_STATUS command. The format is given in Figure 7-10. 1. Byte 2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3.2.4 Format R3 This response token is sent by the card when a READ_OCR command is received. The response length is 5 bytes (see Figure 7-11). The structure of the first (MSB) byte is identical to response type R1. The other four bytes contain the OCR register. 0 32 31 39 0 R1 OCR Figure 7-11: R3 Response Format 7.3.2.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3.3 Control Tokens Data block transfer is controlled by some tokens. 7.3.3.1 Data Response Token Every data block written to the card will be acknowledged by a data response token. It is one byte long and has the following format: 7 6 5 4 3 2 1 0 x x x 0 Status 1 The meaning of the status bits is defined as follows: '010' - Data accepted.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.3.3.3 Data Error Token If a read operation fails and the card cannot provide the required data, it will send a data error token instead. This token is one byte long and has the following format: 7 0 0 0 0 0 Error CC Error Card ECC Failed out of range Figure 7-13: Data Error Token The 4 least significant bits (LSB) are the same error bits as in response format R2. 7.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Identifier Clear Condi tion2 E R X '0'= no error A general or an unknown error C '1'= error occurred during the operation. E R X '0'= no error Can be either of the following C '1'= error errors: - The read only section of the CSD does not match the card content. - An attempt to reverse the copy (set as original) or permanent WP (unprotected) bits was made.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 7.5 SPI Bus Timing Diagrams This section is a blank in the Simplified Specification. 7.6 SPI Electrical Interface The electrical interface is identical to SD mode with the exception of the programmable card output drivers’ option, which is not supported in SPI mode. 7.7 SPI Bus Operating Conditions Bus operating conditions are identical to SD mode 7.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 8. Sections Effective to SD I/F Mode and UHS-II Mode Table 8-1 shows the relation of Sections in this document that is effective to Legacy SD I/F mode and UHS-II mode. Section 1. 2. 3. 3.1 3.2 3.3 3.3.1 3.3.2 3.4 3.5 3.5.1 3.5.2 3.5.3 3.6 3.6.1 3.6.2 3.6.3 3.7 3.7.1 3.7.2 3.8 3.9 3.10 4. 4.1 4.2 4.2.1 4.2.2 4.2.3 4.2.3.1 4.2.4 4.3 4.3.1 4.3.2 4.3.3 4.3.4 4.3.5 4.3.6 4.3.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 4.3.7.4 4.3.7.5 4.3.7.6 4.3.8 4.3.9 4.3.10 4.3.11 4.3.12 4.3.13 4.3.14 4.4 4.5 4.6 4.6.1 4.6.2 4.7 4.7.1 4.7.2 4.7.3 4.7.4 4.7.5 4.8 4.9 4.10 4.11 4.12 4.13 4.14 4.15 5. 5.1 5.2 5.3 5.3.1 5.3.2 5.3.3 5.4 5.5 5.6 5.7 5.8 6. 6.1 6.2 6.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 6.4.1 6.4.2 6.5 6.6 6.6.1 6.6.2 6.6.3 6.6.4 6.6.5 6.6.6 6.6.7 6.7 6.8 7. 8. A.1 B.1 B.2 D.1 C.1 E.1 E.2 Power Up Sequence for SD Bus Interface Power Up Sequence for UHS-II Interface Programmable Card Output Driver (3.3V Single End) Bus Operating Conditions for 3.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Appendix A (Normative) : Reference A.1 Related Documentation • • • • • • • • Part 1 UHS-II Addendum Version 1.00 or later Part 1 Standard Size SD Card Mechanical Addendum Version 4.00 or later Part 1 miniSD Memory Card Addendum Version 2.01 Part 1 microSD Memory Card Addendum Version 4.00 or later Part 2 File System Specification Version 3.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Appendix B (Normative) : Special Terms B.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 UHS104 UHS156 UHS-II I/F VCA VHS VDD VDD1 VDD2 VSS X5R/X7R One of UHS-I Card Types supporting SDR104 UHS-II Generation 1 Card Type supporting FD156 and HD312 (Optional) Interface using contact pin numbers 7 to 8 and 10 to 17. Card accepted voltage range Host supplied voltage range + power supply of non UHS-II Card 3.3V range power supply for UHS-II Card (First row) 1.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Appendix C (Informative) : Examples for Fixed Delay UHS-I Host Design This section is a blank in the Simplified Specification.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Appendix D : UHS-I Tuning Procedure This section is a blank in the Simplified Specification.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Appendix E : Host Power Delivery Network (PDN) Design Guide This section is a blank in the Simplified Specification.
©Copyright 2001-2013 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 4.10 Appendix F : Application Notes of Extension Function F.1 Identification of Function Driver There are two types of function drivers. "Standard Driver" controls a Standard Function, which will be defined by a Function Specification and it will be provided by OS or Host System vendor.