User's Manual

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Table Of Contents

Screen Service SDT ARK 1 ECHO Operations

Jan, 2012 v 1.ATSC_FCC Page 3 - 134

Issue

Ethernet Interface – Port

10001

Java

SNMP

Ethernet

interface

– Port

5000

Char interface

Local

Interface

(Display)

MIP

OPTO

Block

output

channel

setting

Commands: “oo” and “w” uC

registers 0x02 and 0x12

uC ignores the commands

Java

control

is

disabled

SNMP

commands

are

ignored

Not

present

Commands: “O”

or “o” and “W”

or “w” uC

registers 0x02

and 0x12

The control is

enabled

Not

present

Not

present

Not

present

Block

frequency

offset

setting

Commands:

“w” FPGA registers

0x07 up to 0x0A and 0x17 up to

0x1A

uC ignores the command

Java

control

is

disabled

SNMP

commands

are

ignored

Not

present

Commands:

“W” or “w”

FPGA registers

0x07 up to

0x0A and 0x17

up to 0x1A

The control is

enabled

Not

present

Frequency

offset

function is

disabled

from uC

Command:

“W” FPGA

register

0x0020

bit 1=0

Not

present

Block MIP

frequency

offset

setting

Command:

“w” FPGA register 0x0020 bit 1

uC ignores the command

Java

control

is

disabled

SNMP

commands

are

ignored

Not

present

Command:

“w” or “w”

FPGA register

0x0020 bit 1

The control is

enabled

Not

present

Not

present

Block

power

setting

Commands: “op” and “w” uC

registers 0x0C and 0x0B, and

0x1C and 0x1B

uC ignores the command

Java

control

is

disabled

SNMP

commands

are

ignored

Not

present

Command:

“OP” or “op”

and “W” or “w”

uC registers

0x0C and 0x0B,

and 0x1C and

0x1B

The control is

enabled

Not

present

Tx power

function is

disabled

from uC

Command:

“W” FPGA

register

0x0020

bit 2=0

Not

present

Block MIP

TX power

setting

Command:

“W” FPGA register 0x0020 bit 2

uC ignores the command

Java

control

is

disabled

SNMP

commands

are

ignored

Not

present

Command:

“W” or “w”

FPGA register

0x003B bit 2

The control is

enabled

Not

present

Not

present