User manual
Appendix
ComTec GmbH 7-2
7.2. Block Diagram
7.3. Specification
7.3.1. Absolute Maximum Ratings
Supply voltage (VCC): .........................................................................................-0.5 to 6.0V
Input voltage (any port): .............................................................................-0.5 to VCC + 0.5V
DC Input current (any port): ................................................................................................+20mA
7.3.2. Recommended Operating Conditions
Supply voltage: (VCC from PC power supply)........................................................ 5V
Temperature range: ............................................................................................ 0 to 50°C
FHS Link cable length: ........................................................................................... max. 10m
FMP bus cable length: (overall) ...........................................................................max. 90cm
ADC connection cable: .......................................................................................... max. 1m
.................................. (adjacent ribbon cables should be shielded)
GO Line load: ............................................................................. min. 1kΩ to VCC
or ............................................................................min. 2k to GND
7.3.3. Power Requirements
Supply voltage: ......................................................................................... 5V + 0.25V
Digital I/O Analog Out
PCI Interface
Control
8
FIFO
1024 x 32
ADC A
ADC B
ADC C
ADC D
CONTROL
AUX 1
AUX 2
REJECT
EVENT
DETECT/REJECT
COINCIDENCE
TIMER
FHS LINK
INTERFACE
FMP BUS
INTERFACE
QUAD ADC
INTERFACE
QUAD ADC
INTERFACE
QUAD ADC
INTERFACE
QUAD ADC
INTERFACE
GO LINE
ADD-ON PORTS
FHS LINK
F
M
P
B
U
S
F
M
P
B
U
S
PCI INTERFACE CARD
BASE MODULE
QUAD ADC PORT MODULE
QUAD ADC PORT MODULE
QUAD ADC PORT MODULE
ADC A
ADC B
ADC C
ADC D
ADC A
ADC B
ADC C
ADC D
ADC A
ADC B
ADC C
ADC D
ADC 1A
ADC 1B
ADC 1C
ADC 1D
ADC 2A
ADC 2B
ADC 2C
ADC 2D
ADC 3A
ADC 3B
ADC 3C
ADC 3D
ADC 4A
ADC 4B
ADC 4C
ADC 4D
F
M
P
B
U
S
48 BIT RTC /
TIMER / COUNTER
Figure 7.1: MPA-3 system block diagram