Specifications

Analog Input Modules
212
31007715 6/2008
Data
Word Structure
The first, third, fifth, seventh, ninth, eleventh, thirteenth, and fifteenth registers in the
module's input process image are the data words. Each register represents the input
current of a channel in the IEC data format. The data has 15-bit + sign resolution.
The bit structure in each data register is as follows:
All 16 bits in each data word are significant. They allow you to represent analog input
voltages with all the integer values ranging from -32 768 to 32 767.
For the 1 to 5 VDC, 0 to 5 VDC, and 0 to 10 VDC operating ranges, the sign bit (bit
15) is always 0, indicating that negative voltage values are not read.
Data Formats +1 to 5 VDC and 0 to 5 VDC
In an ideal linear voltage representation for +1 to 5 VDC range (one with default
offset or max count settings (see p. 203)), a value of 32 001 represents an over
voltage warning (OVW). If the input value is less than or equal to -1, the module will
report an under voltage warning (UVW). When the input value reaches 32 767, an
over voltage error (OVE) occurs. When the input value reaches -767, an under
voltage error (UVE) occurs.
Note: Errors and warnings are based on count values, not physical values. The
current values in the tables below are ideal values.
Error +1 to 5 VDC Range 0 to 5 VDC Range
OVE (over voltage error) 5.10 VDC
(32 767)
5.12 VDC
(32 767)
OVW (over voltage warning) > 5 VDC
(32 001)
>5VDC
(32 001)
UVW (under voltage warning) < 1 VDC
(-1)
<0.12VDC
(767)
UVE (under voltage error) <= 0.91 VDC
(-767)
0 VDC
(0)
2
14
2
13
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
sign
8
0
STB AVI 1400 Data Register Format
12
3
4
5
6
7
910111213
14
15
2
2
2
1
2
0
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com