User guide

System Specifications
162
890 USE 108 00 August 2001
The following table is table 3 of the technical specifications.
Logic Solve
Time
0984/A984 PICs 4.25 ms ... 6 ms/K nodes standard ladder logic (not
including end-of-scan diagnostics, I/O processing, or
Modbus command handling)
E984-24x/25x 2.13 ms ... 3 ms/K nodes standard ladder logic (not
including end-of-scan diagnostics, I/O processing, or
Modbus command handling)
E984-258/265/
275/285
0.2ms/k minimum, average for 1K (binary logic)
0.6ms/k maximum average for 1K (binary logic)
Throughput 0984/A984 PLCs 8 ms ... 11 ms for 64 I/O points and 1K of logic
E984-24x/25x
PLCs Only
4 ms ... 5.5 ms for 64 I/O points and 1K of logic
E984-258/265/
275/285 PLCs
Only
6.7 ms average for 6.1K logic
6.2ms average for 4.2K logic
6.1 ms average for 2.5K logic
6.0 ms average for 1.6K logic
Timers
(A984, E984-
241/25 1/255)
Watch Dog Timer 250 ms, with nominal +10%, selectable time-out
Time of Day
Clock
Variation @ 255 C = < + 30 seconds/month Max.
Variation @ 605 C = + 4 minutes/month
Timers
(E984-258/26
5/275/285
Watch Dog Timer 250 ms (S/W adjustable)
Time of Day
Clock
+ 8.0 seconds/day @ 0 ... 605 C
CPU
Diagnostic
Procedures
Schedule Continuous, commencing at power up
Tests Available memory for both RAM and ROM, Internal
processor resources; Communication with peripheral
and/or networked devices; I/O bus during I/O activity
Normal CPU
failure response
Orderly termination of the process and logging of the
error condition
Error code
accessibility
From programming panel or DAP, except for catastrophic
CPU failure
Catastrophic
failure response
READY LED goes OFF and system fails to respond
Executive
failures (E984’s)
If memory checksum fails the RUN LED will blink 3 times
for.5 seconds followed by a rest period of 2.5 seconds
then the pattern repeats. The controller has detected a
STOP ERROR CODE and may require either restarting,
reloading of the user logic, or reloading of the executive
firmware.