Specifications

Watson-TDM-Manual-W.doc
Version 2.0-01
Watson TDM
Operating Manual
Revision: 2008-02-07 3-7
3.2.4 E1 Clock Modes
Clock architecture
The following block diagram shows the clock architecture of the modems. The
external clock option is only available on plug-in modems.
E1
Tx
External
Clock
DSL
Tx
E1
Rx
DSL
Rx
Recovered 2048 kHz
Clock
2 Mbit/s Tx
Clock
INP 2048 kHz
E1
Side
DSL
Side
Internal
Clock
(Multipoint)
Stuff/
Delete
2'048 KHz
Clock
Recovery
Figure 3-3: Clock architecture
Note:
Signals sent towards the DSL link are denoted as Tx and signals coming from the
DSL link are denoted as Rx.
As long as the DSL link is not established, the internal clock signal is used as
clock source.
The clock sources are automatically switched by the microcontroller, depending
on the current signal and clock status, which is updated every 100 ms.
The transmit clocks of the two E1 data directions are independent of each other.
Both plesiochronous and synchronous operation modes are possible. Synchro-
nous operation occurs when the E1 equipment at one end of the DSL link uses
the receive clock as transmit clock, as shown below.
Tx
Rx
Rx
2048 kHz
Clock
E1 Equipment
DSL
E1 Equipment
Tx
Modem Modem
Figure 3-4: Synchronous Operation (=”Loop Timing”)
Warning:
Do not configure the E1 interfaces at both ends to use the receive clock as
transmit clock except if one DSL modem is a plug-in card using the “External
Clock” or "Internal clock" option. Otherwise there will be no defined clock.