Schematics

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
# if the boot configure pins have been used as GPIO, the GPIO should be used as
output rather than input for the PU/PD restriction !!!
GPIO6_IO11
GPIO6_IO14
DSI_REXTCSI_REXT
GPIO_19
I2C1_SDA
I2C1_SCL
GPIO_18
UART1_TXD17
UART1_RXD17
AUD3_RXD13
AUD3_TXFS13
AUD3_TXD13
AUD3_TXC13
GPIO0 13
GPIO1 13
GPIO2 13
GND
GND
3P3V
I2C3_SDA 1,4,13,17
I2C3_SCL 1,4,13,17
I2C2_SCL 4,9,10,13,16
I2C2_SDA 4,9,10,13,16
CSI0_DAT1210
CSI0_DAT1310
CSI0_DAT1410
CSI0_DAT1510
CSI0_DAT1610
CSI0_DAT1710
CSI0_DAT1810
CSI0_DAT1910
CSI0_PCLK10
CSI0_HSYNC10
CSI0_VSYNC10
EIM_D17 10
EIM_D28 10
EIM_D27 10
EIM_D26 10
EIM_D20 10
EIM_D19 10
EIM_D18 10
EIM_D16 10
EIM_EB2 10
EIM_D29 10
EIM_EB3 10
UART5_RXD 15
UART5_TXD 15
UART4_RXD 17
UART4_TXD 17
CAN1_TXCAN 17
CAN1_RXCAN 17
I2C2_SCL 4,9,10,13,16
I2C2_SDA 4,9,10,13,16
I2C3_SDA 1,4,13,17
I2C3_SCL 1,4,13,17
SD2_CMD16
SD2_CLK16
SD2_DAT116
SD2_DAT316
SD2_DAT016
SD4_DAT1 7
SD4_DAT2 7
SD4_DAT3 7
SD4_DAT0 7
SD4_DAT4 7
SD4_DAT5 7
SD4_DAT6 7
SD4_DAT7 7
SD4_CLK 7
SD4_CMD 7
DISP0_DAT10 16
DISP0_DAT11 16
DISP0_DAT12 16
DISP0_DAT13 16
DISP0_DAT14 16
UART2_CTS16
UART2_RTS16
UART2_TXD16
UART2_RXD16
SD1_CMD14
SD1_CLK14
SD1_DAT014
SD1_DAT114
SD1_DAT214
SD1_DAT314
SD2_DAT216
DISP0_DAT0 12
DISP0_DAT1 15
DISP0_DAT2 15
DISP0_DAT3 15
DISP0_DAT4 15
DISP0_DAT5 17
DISP0_DAT6 10
DISP0_DAT7 10
DISP0_DAT8 9
DISP0_DAT9 9
DISP0_DAT16 16
DISP0_DAT17 16
DISP0_DAT18 16
DISP0_DAT19 16
DISP0_DAT20 15
DISP0_DAT21 15
DISP0_DAT22 15
DISP0_DAT23 15
EIM_DA0 11
EIM_DA1 11
EIM_DA2 11
EIM_DA3 11
EIM_DA4 11
EIM_DA5 11
EIM_DA6 11
EIM_DA7 11
EIM_DA8 11
EIM_DA9 11
EIM_DA10 11
EIM_DA11 11
EIM_DA12 11
EIM_DA13 11
EIM_DA14 11
EIM_DA15 11
NGPIO0 17
NGPIO1 17
NGPIO2 17
CAN2_TXCAN 17
CAN2_RXCAN 17
KD_GPIO014
HDMI_DDC_SCL 9,10,13,16
HDMI_DDC_SDA 9,10,13,16
USB_OTG_I D 12
SPI2_MISO 17
SPI2_MOSI 17
SPI2_SCLK 17
DISP0_DAT15 17
GPIO_19 14
I2C1_SDA13
I2C1_SCL13
LVDS_POREN2 9
LVDS_POREN1 9
GPIO_18 13
GPIO_3 8
GPIO_4 8
GPIO_8 8
GPIO_9 8
Channel_A 13
Channel_B 13
FM_ANT_EN 8
UART3_RXD 16
UART3_TXD 16
Title
Size Document Number Rev
Date: Sheet of
<Doc> <RevCode>
<Title>
D
4 17Friday, July 24, 2015
Title
Size Document Number Rev
Date: Sheet of
<Doc> <RevCode>
<Title>
D
4 17Friday, July 24, 2015
Title
Size Document Number Rev
Date: Sheet of
<Doc> <RevCode>
<Title>
D
4 17Friday, July 24, 2015
R55
4.7K
.
5%
R53
6.04K/1%
.
1%
R54
6.04K/1%
.
1%
R57
4.7K
.
5%
R58
4.7K
.
5%
i.MX6Q - DISP; CSI
NVCC_CSI
NVCC_LCD
NVCC_MIPI
NVCC_MIPI
U8D
MCIMX6D5EYM10AD
CSI0_DAT8
N6
CSI0_DAT9
N5
CSI0_DAT10
M1
CSI0_DAT11
M3
CSI0_DAT12
M2
CSI0_DAT13
L1
CSI0_DAT14
M4
CSI0_DAT15
M5
CSI0_DAT16
L4
CSI0_DAT17
L3
CSI0_DAT18
M6
CSI0_DAT19
L6
CSI0_VSYNC
N2
CSI0_PIXCLK
P1
CSI0_MCLK
P4
DI0_PIN4
P25
DISP0_DAT0
P24
DISP0_DAT1
P22
DISP0_DAT2
P23
DISP0_DAT3
P21
DISP0_DAT4
P20
DISP0_DAT5
R25
DISP0_DAT6
R23
DISP0_DAT7
R24
DISP0_DAT8
R22
DISP0_DAT9
T25
DISP0_DAT10
R21
DISP0_DAT11
T23
DISP0_DAT12
T24
DISP0_DAT13
R20
DISP0_DAT14
U25
DISP0_DAT15
T22
DISP0_DAT16
T21
DISP0_DAT17
U24
DISP0_DAT18
V25
DISP0_DAT19
U23
DISP0_DAT20
U22
DISP0_DAT21
T20
DISP0_DAT22
V24
DISP0_DAT23
W24
DI0_PIN3
N20
DI0_DISP_CLK
N19
DI0_PIN2
N25
DI0_PIN15
N21
CSI0_DAT4
N1
CSI0_DAT5
P2
CSI0_DAT6
N4
CSI0_DAT7
N3
CSI0_DATA_EN
P3
CSI_CLK0M
F4
CSI_CLK0P
F3
CSI_D0M
E4
CSI_D0P
E3
CSI_D1M
D1
CSI_D1P
D2
CSI_D2M
E1
CSI_D2P
E2
CSI_D3M
F2
CSI_D3P
F1
CSI_REXT
D4
DSI_CLK0M
H3
DSI_CLK0P
H4
DSI_D0M
G2
DSI_D0P
G1
DSI_D1M
H2
DSI_D1P
H1
DSI_REXT
G4
i.MX6Q - EIM
NVCC_EIM2 NVCC_EIM0 NVCC_EIM1
U8A
MCIMX6D5EYM10AD
EIM_OE
J24
EIM_WAIT
M25
EIM_BCLK
N22
EIM_LBA
K22
EIM_RW
K20
EIM_EB0
K21
EIM_EB1
K23
EIM_EB2
E22
EIM_EB3
F23
EIM_CS0
H24
EIM_CS1
J23
EIM_A16
H25
EIM_A17
G24
EIM_A18
J22
EIM_A19
G25
EIM_A20
H22
EIM_A21
H23
EIM_A22
F24
EIM_A23
J21
EIM_A24
F25
EIM_A25
H19
EIM_D16
C25
EIM_D17
F21
EIM_D18
D24
EIM_D19
G21
EIM_D20
G20
EIM_D21
H20
EIM_D22
E23
EIM_D23
D25
EIM_D24
F22
EIM_D25
G22
EIM_D26
E24
EIM_D27
E25
EIM_D28
G23
EIM_D29
J19
EIM_D30
J20
EIM_D31
H21
EIM_DA0
L20
EIM_DA1
J25
EIM_DA2
L21
EIM_DA3
K24
EIM_DA4
L22
EIM_DA5
L23
EIM_DA6
K25
EIM_DA7
L25
EIM_DA8
L24
EIM_DA9
M21
EIM_DA10
M22
EIM_DA11
M20
EIM_DA12
M24
EIM_DA13
M23
EIM_DA14
N23
EIM_DA15
N24
i.MX6Q
NVCC_ENETNVCC_GPIO
NVCC_SD3NVCC_SD2NVCC_SD1
NVCC_NANDF
U8B
MCIMX6D5EYM10AD
KEY_COL0
W5
KEY_COL1
U7
KEY_COL2
W6
KEY_COL3
U5
KEY_COL4
T6
KEY_ROW0
V6
KEY_ROW1
U6
KEY_ROW2
W4
KEY_ROW3
T7
KEY_ROW4
V5
SD1_CMD
B21
SD1_CLK
D20
SD1_DAT0
A21
SD1_DAT1
C20
SD1_DAT2
E19
SD1_DAT3
F18
SD2_CMD
F19
SD2_CLK
C21
SD2_DAT0
A22
SD2_DAT1
E20
SD2_DAT2
A23
SD2_DAT3
B22
ENET_CRS_DV
U21
ENET_MDC
V20
ENET_MDIO
V23
ENET_REF_CLK
V22
ENET_RXD0
W21
ENET_RX_ER
W23
ENET_RXD1
W22
ENET_TX_EN
V21
ENET_TXD0
U20
ENET_TXD1
W20
GPIO_0
T5
GPIO_1
T4
GPIO_9
T2
GPIO_3
R7
GPIO_6
T3
GPIO_2
T1
GPIO_4
R6
GPIO_5
R4
GPIO_7
R3
GPIO_8
R5
GPIO_16
R2
GPIO_17
R1
GPIO_18
P6
GPIO_19
P5
SD3_DAT7
F13
SD3_DAT6
E13
SD3_DAT5
C13
SD3_DAT4
D13
SD3_CMD
B13
SD3_CLK
D14
SD3_DAT0
E14
SD3_DAT1
F14
SD3_DAT2
A15
SD3_DAT3
B15
SD3_RST
D15
MLB_CP
B11
MLB_CN
A11
MLB_SP
B9
MLB_SN
A9
MLB_DP
A10
MLB_DN
B10
NANDF_CS0
F15
NANDF_CS1
C16
NANDF_CS2
A17
NANDF_CS3
D16
NANDF_ALE
A16
NANDF_CLE
C15
NANDF_WP
E15
NANDF_RB0
B16
NANDF_D0
A18
NANDF_D1
C17
NANDF_D2
F16
NANDF_D3
D17
NANDF_D4
A19
NANDF_D5
B18
NANDF_D6
E17
NANDF_D7
C18
SD4_CLK
E16
SD4_CMD
B17
SD4_DAT0
D18
SD4_DAT1
B19
SD4_DAT2
F17
SD4_DAT3
A20
SD4_DAT4
E18
SD4_DAT5
C19
SD4_DAT6
B20
SD4_DAT7
D19
R56
4.7K
.
5%