Specifications

124 Data Path Routing (DPR) HighWire MTP-2 - 1.2, September 4, 2002
DPR_ENABLE_CLKERR_CALLBACK. This command enables the specified clock
error watchdogs in the T8102 and causes the board to send unsolicited clock
error messages to the application on the fildes Stream. The application must
either periodically perform non-blocking getmsg(2) calls or set up a task to
receive these unsolicited messages. Note that either a
DPR_DISABLE_CLKERR_CALLBACK command or a close should be the only
DPR actions after issuing this command.
Arg points to a CLKERROREVENT structure. Only the clkWdogMask and
err3Data elements are used with this command. The elements in the
structure are:
DPR_DISABLE_CLKERR_CALLBACK. This command disables the clock error
watchdogs in the T8102 and stops the board from sending unsolicited clock
error messages to the application.
No argument is required, so the value of arg should be zero.
DPR_GET_CLOCK_INFO. This command retrieves the current contents of
selected clocking registers in the T8102.
Arg points to a T8100_CLOCK_INFO structure with the following elements:
UINT32 clkWdogMask CKW mask for what errors to enable: i.e.
CKW_NETREF.
UINT32 errSource error source: CLKERR1, CLKERR2, CLKERR3 or
SYSERR.
UINT32 err1Data error reason for CLKERR1.
UINT32 err2Data error reason for CLKERR2.
UINT32 err3Data error reason for CLKERR3; set bit 0 to enable
NETREF2 error reporting.
UINT32 sysErrData error reason for sysErr.
UINT8 ckm Master Clock Register.
UINT8 ckn NETREF Selection Register.
UINT8 ckp Programmable Outputs Register.
UINT8 ckr Clock Resource Selection Register.
UINT8 cks Secondary/Fallback Clock Register.
UINT8 ck32 Local Clocks 2 and 3 Source Selection Register.
UINT8 ckmd Local Clocks 0 and 1 Source Selection Register.
UINT8 cknd Main Clock Source Divider Register.
UINT8 ckrd Resource Divider Register.