Specifications

HighWire MTP-2 - 1.2, September 4, 2002 dprservice (7D) 105
DPR_PRIMARY_CLOCK. Configures the H.110/CT bus primary clock to use the
specified clocking source.
The putmsg control buffer is a structure of type dpr_usel_t with the usel_val
element specifying the clocking source. The getmsg control buffer returned is
also a dpr_usel_t structure with the error code in the usel_err element (zero
on success). The allowed clock source values are:
DPR_FALLBACK_CLOCK. Configures the H.110/CT bus fallback or secondary
clock to use the specified clocking source.
The putmsg control buffer is a structure of type dpr_usel_t with the usel_val
element specifying the clocking source. The getmsg control buffer returned is
also a dpr_usel_t structure with the error code in the usel_err element (zero
on success). The allowed clock source values are a subset of the possibilities
for the primary clock. In particular, LREF0 and LREF4-7 are not available nor
is the clock source that is used for the primary clock.
T8100_CLK_INTERNAL Run the primary clock from the internal
oscillator.
T8100_CLK_FRAMEA Run the primary clock from Frame A.
T8100_CLK_FRAMEB Run the primary clock from Frame B.
T8100_CLK_NETREF1 Run the primary clock from External Net
Reference 1.
T8100_CLK_NETREF2 Run the primary clock from External Net
Reference 2.
T8100_CLK_LREF0 Run the primary clock from Local Reference 0.
T8100_CLK_LREF1 Run the primary clock from Local Reference 1.
T8100_CLK_LREF2 Run the primary clock from Local Reference 2.
T8100_CLK_LREF3 Run the primary clock from Local Reference 3.
T8100_CLK_LREF4 Run the primary clock from Local Reference 4.
T8100_CLK_LREF5 Run the primary clock from Local Reference 5.
T8100_CLK_LREF6 Run the primary clock from Local Reference 6.
T8100_CLK_LREF7 Run the primary clock from Local Reference 7.