Specifications

28 Functional Information HW400p/M Technical Reference - 1.0, March 6, 2002

4-7. I/O Bus Control and Miscellaneous Logic

Two Altera CPLD on the main board provide:

• Port-X I/O bus controls signals and glue logic for all devices attached to

the I/O bus

• Control signals that drive the front panel LEDs

• General-purpose I/O registers

•Reset signals

I/O registers The I/O registers are accessible only by the MPC8245. Table 4-4 identifies the

I/O registers.

Table 4-4 I/O registers

Name Description Address Function

ISRA MPC8245 interrupt source

FFE20000 Read only

ISRB MPC8245 interrupt source

FFE20001 Read only

IERA Interrupt enable register A FFE20002 Read-write

IERB Interrupt enable register B FFE20003 Read-write

PCSR Port clock select FFE20004 Read-write

BSR Board status register FFE20005 Read-write

LED LED register FFE20006 Read-write

GAR Geographic address register FFE20008 Read only

POR Port Option Register FFE2000C Read only

BOR Board Option Register FFE2000D Read only

GPR General Purpose Register FFE2000E Read-write