User Manual

TriFlash Interface Description
TriFlash with SD Interface Product Manual (Preliminary), Rev. 1.2 © 2002/2003 SANDISK CORPORATION
3-11
Table 3-7. Bus Timing
Parameter Symbol Min. Max. Unit Remark
Clock CLK–All values are referred to min. (V
IH
) and max. (V
IL
)
6
Clock Frequency Data Transfer Mode f
PP
0 25 MHz
C
L
≤ 100 pF
(7 cards)
Clock Frequency Identification Mode (The low
frequency is required for MultiMediaCard compatibility)
f
OD
0
(1)
/
100KHz
400 kHz
C
L
≤ 250 pF
(21 cards)
Clock Low Time t
WL
10 ns
C
L
≤ 100 pF
(7 cards)
Clock High Time t
WH
10 ns
C
L
≤ 100 pF
(7 cards)
Clock Rise Time t
TLH
10 ns
C
L
≤ 100 pF
(10 cards)
Clock Fall Time t
THL
10 ns
C
L
≤ 100 pF
(7 cards)
Clock Low Time t
WL
50 ns
C
L
≤ 250 pF
(21 cards)
Clock High Time t
WH
50 ns
C
L
≤ 250 pF
(21 cards)
Clock Rise Time t
TLH
50 ns
C
L
≤ 250 pF
(21 cards)
Clock Fall Time t
THL
50 ns
C
L
≤ 250 pF
(21 cards)
Inputs CMD, DAT (referenced to CLK)
Input set-up time t
ISU
5 ns
C
L
≤ 25 pF
(1 cards)
Input hold time t
IH
5 ns
C
L
≤ 25 pF
(1 card)
Outputs CMD, DAT (referenced to CLK)
Output delay time during Data Transfer Mode t
ODLY
0 14 ns
C
L
≤ 25 pF
(1 card)
Output delay time during Identification Mode t
ODLY
0 50 ns
C
L
≤ 25 pF
(1 card)
6
0 Hz stops the clock. The given minimum frequency range is for cases where a continuous clock is required.