Product manual

After power up, the host starts the clock and sends the initializing sequence on the CMD line. This sequence is a

contiguous stream of logical ‘1’s. The sequence length is the maximum of 1msec, 74 clocks or the supply-ramp-up-

time; the additional 10 clocks (over the 64 clocks after what the card should be ready for communication) is

provided to eliminate power-up synchronization problems.

Every bus master shall have the capability to implement ACMD41 and CMD1. CMD1 will be used to ask

MultiMediaCards to send their Operation Conditions. In any case the ACMD41 or the CMD1 shall be send

separately to each card accessing it through its own CMD line.

3.4.2. Bus Operating Conditions

SPI Mode bus operating conditions are identical to SD Card mode bus operating conditions. Table 3-3 lists the

power supply voltages. The CS (chip select) signal timing is identical to the input signal timing (see Figure 3-8).

Table 3-3. Power Supply Voltage

General

Parameter Symbol Min. Max. Unit Remark

Peak voltage on all lines -0.3 VDD+0.3 V

All Inputs

Input Leakage Current -10 10

µA

All Outputs

Output Leakage Current -10 10

µA

Power Supply Voltage

Parameter Symbol Min. Max. Unit Remark

Supply Voltage V

2.0 3.6 V CMD0, 15, 55,

ACMD41 commands

Supply Voltage 2.7 3.6 V Except CMD0, 15, 55,

ACMD41 commands

Supply voltage differentials (V

SS1

, V

SS2

) -0.3 0.3 V

Power up Time 250 mS From 0V to V

Min.

3.4.3. Bus Signal Line Load

The total capacitance CL of the CLK line of the miniSD Card bus is the sum of the bus master capacitance CHOST,

the bus capacitance CBUS itself and the capacitance CCARD of each card connected to this line:

CL = CHOST + CBUS + N∗CCARD

Where N is the number of connected cards. Requiring the sum of the host and bus capacitances not to exceed 30 pF

for up to 10 cards, and 40 pF for up to 30 cards, the values in Table 3-4 must not be exceeded.