Product manual

5-17 SanDisk miniSD Card Product Manual, Rev. 1.1 © 2003 SANDISK CORPORATION
5.4.1. Command/Response
Host Command to Card Response−Card is Ready
CS
H H L L L * * * * * * * * * * * * * * * * * * * L L L L H H H
<-N
CS
-> <-N
EC
->
DataIN
X X H H H H 6 Bytes Command H H H H H * * * * * * * * * * * * * * * H H H H X X X
<-N
CR
->
DataOut
Z Z Z H H H H * * * * * * * * H H H H H 1 or 2 Bytes Response H H H H H Z Z
Figure 5-11. Host Command to Card Response−Card is Ready
Host Command to Card Response−Card is Busy
The following timing diagram describes the command response transaction for commands when the card responses
which the R1b response type (e.g., SET_WRITE_PROT and ERASE). When the card is signaling busy, the host
may deselect it (by raising the CS) at any time. The card will release the DataOut line one clock after the CS going
high. To check if the card is still busy it needs to be reselected by asserting (set to low) the CS signal. The card will
resume busy signal (pulling DataOut low) one clock after the falling edge of CS.
CS
H L L L * * * * * * * * * * * * * * * * * * * L L L L H H H L L L L L L H H
<-N
CS
-> <-N
EC
-> <-N
DS
-> <-N
EC
->
DataIN
X H H H H 6 Bytes Command H H H H H H H H H H H H H X X X H H H H H H X X
<-N
CR
->
DataOut
Z Z H H H H * * * * * * * * H H H H Card Response Busy L Z Z Z Busy H H H H Z
Figure 5-12. Host Command to Card Response−Card is Busy
Card Response to Host Command
CS
L L L L L * * * * * * * * * * * * * * * * * * * L L H H H H
DataIN
H H H H H H * * * * * * * * * * * * * H H H H 6 Bytes Command H H H X X X X
<-N
CR
->
DataOut
H H H H H 1 or 2 Bytes Response H H H H * * * * * * * * * * * * * * * * * H H H H Z Z Z
Figure 5-13. Card Response to Host Command
5.4.2. Data Read
The following timing diagram describes all single block read operations with the exception of SEND_CSD
command.
CS
H L L L * * * * * * * * * * * * * * * * * * * * * * * * * * * * L L L H H H H
<-N
CS
-> <-N
EC
->
DataIN
X H H H H Read Command H H H H H * * * * * * * * * * * * * * * * * * * * * * * * * H H H X X X X
<-N
CR
-> <-N
AC
->
DataOut
Z Z H H H H * * * * * * * * H H H H Card Response H H H H Data Block H H H H Z Z Z
Figure 5-14. Single Block Read Timing