SanDisk Secure Digital Card Product Manual Version 1.9 Document No. 80-13-00169 December 2003 SanDisk Corporation Corporate Headquarters • 140 Caspian Court • Sunnyvale, CA 94089 Phone (408) 542-0500 • Fax (408) 542-0503 www.sandisk.
SanDisk® Corporation general policy does not recommend the use of its products in life support applications where in a failure or malfunction of the product may directly threaten life or injury. Per SanDisk Terms and Conditions of Sale, the user of SanDisk products in life support applications assumes all risk of such use and indemnifies SanDisk against all damages. See “Limited Warranty and Disclaimer of Liability.” This document is for information use only and is subject to change without prior notice.
Table of Contents 1. Introduction to the SD Card ............................................................................................................................... 1-1 1.1. Scope ................................................................................................................................................. 1-2 1.2. Product Models ................................................................................................................................. 1-2 1.3.
Table of Contents 3.1.2. Pin Assignments in SPI Mode................................................................................................. 3-2 3.2. SD Bus Topology.............................................................................................................................. 3-3 3.2.1. Power Protection ..................................................................................................................... 3-5 3.3. SPI Bus Topology ......................................
Table of Contents 4.11.3. Data Write ............................................................................................................................. 4-29 4.11.4. Timing Values....................................................................................................................... 4-32 5. SPI Protocol Definition ...................................................................................................................................... 5-1 5.1. SPI Bus Protocol .........
Table of Contents File System Support ................................................................................................................................. A-5 Appendix B. Ordering Information ........................................................................................................................ B-1 Appendix C. SanDisk Worldwide Sales Offices .................................................................................................... C-1 Appendix D. Limited Warranty....
1. Introduction to the SD Card The Secure Digital Card is a flash-based memory card that is specifically designed to meet the security, capacity, performance and environmental requirements inherent in newly emerging audio and video consumer electronic devices. The SD Card includes a copyright protection mechanism that complies with the security of the SDMI standard, and is faster and capable of higher Memory capacity.
Introduction to the SD Card 1.1. Scope This document describes the key features and specifications of the SD Card, as well as the information required to interface this product to a host system. 1.2. Product Models The SD Card is available in the capacities shown in Table 1-1. Table 1-1. SD Card Capacities Model No. Capacities SDSDB-16 16 MB SDSDB-32 32 MB SDSDJ-64 64 MB SDSDJ-128 128 MB SDSDJ-256 256 MB SDSDJ-512 512 MB SDSDJ-1024 1024 MB SDSDB = Binary NAND technology.
Introduction to the SD Card • Comfortable erase mechanism. The performance of the communication channel is described in Table 1-2. Table 1-2. SD Bus/SPI Bus Comparison SD Card Using SD Bus SD Card Using SPI Bus Six-wire communication channel (clock, command, 4 data lines). Three-wire serial data bus (Clock, dataIn, dataOut) + card specific CS signal (hardwired card selection). Error-protected data transfer. Optional non-protected data transfer mode available.
Introduction to the SD Card 1.5.1. Flash Technology Independence The 512-byte sector size of the SD Card is the same as that in an IDE magnetic disk drive. To write or read a sector (or multiple sectors), the host computer software simply issues a Read or Write command to the SD Card. This command contains the address. The host software then waits for the command to complete. The host software does not get involved in the details of how the flash memory is erased, programmed or read.
Introduction to the SD Card 1.5.4. Endurance SanDisk SD Cards have an endurance specification for each sector of 100,000 writes typical (reading a logical sector is unlimited). This far exceeds what is typically required in nearly all applications of SD Cards. For example, even very heavy use of the SD Card in cellular phones, personal communicators, pagers and voice recorders will use only a fraction of the total endurance over the typical device’s lifetime.
Introduction to the SD Card 1.5.9. SD Card—SD Bus Mode The following sections provide valuable information on the SC Card in SD Bus mode. 1.5.9.1. SD Card Standard Compliance The SD Card is fully compliant with SD Card Physical Layer Standard Specification V1.01. The structure of the Card Specific Data (CSD) register is compliant with CSD Structure 1.0. 1.5.9.2.
Introduction to the SD Card 1.5.9.5. Memory Array Partitioning The basic unit of data transfer to/from the SD Card is one byte. All data transfer operations which require a block size always define block lengths as integer multiples of bytes. Some special functions need other partition granularity. Figure 1-2 shows the Memory Array Partitioning. For block-oriented commands, the following definition is used: • Block—The unit that is related to the block-oriented read and write commands.
Introduction to the SD Card SD Memory Card WP Group 0 Sector 1 Block 0 Block 1 Block 2 Block n Block 2 Block n Sector 2 Sector 3 Sector n WP Group 1 WP Group n Protected Area (Copyright protection) Sector 1 Block 0 Block 1 Sector n Figure 1-2. Memory Array Partitioning Table 1-3.
Introduction to the SD Card 1.5.9.6. Read and Write Operations The SD Card supports two read/write modes as shown in Figure 1-3.
Introduction to the SD Card 1.5.9.8. Data Protection in the Flash Card Every sector is protected with an Error Correction Code (ECC). The ECC is generated (in the memory card) when the sectors are written and validated when the data is read. If defects are found, the data is corrected prior to transmission to the host. 1.5.9.9. Erase The smallest erasable unit in the SD Card is a sector. In order to speed up the erase procedure, multiple sectors can be erased at the same time.
Introduction to the SD Card 1.5.10.1. Negotiating Operating Conditions The operating condition negotiation function of the SD Card bus is supported differently in SPI mode by using the READ_OCR (CMD58) command. The host shall work within the valid voltage range (2.7 to 3.6 volts) of the card or put the card in inactive state by sending a GO_INACTIVE command to the card. 1.5.10.2. Card Acquisition and Identification The host must know the number of cards currently connected on the bus.
Introduction to the SD Card 1.5.10.9. Write Protection Same as in SD Card mode. 1.5.10.10. Copyright Protection Same as in SD Card mode. 1-12 SanDisk Secure Digital (SD) Card Product Manual, Rev. 1.
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2. Product Specifications For all the following specifications, values are defined at ambient temperature and nominal supply voltage unless otherwise stated. 2.1. System Environmental Specifications Table 2-1. System Environmental Specifications Temperature Operating: -25° C to 85° C Non-Operating: -40° C to 85° C Humidity Operating: 25% to 95%, non-condensing Non-Operating: 25% to 95%, non-condensing ESD Protection Contact Pads: ± 4kV, Human body model according to ANSI EOS/ESD-S5.
Product Specifications 2.3. Typical Card Power Requirements Table 2-3. Card Power Requirements VDD (ripple: max, 60 mV peak to peak) 2.7 V – 3.6 V (Ta = 25°C @3 V) Value Measurement Notes Sleep 250 uA Max Read 65 mA Max Write 75 mA Max 2.4. System Performance Table 2-4. System Performance Typical Maximum Block Read Access Time Binary Products MLC Products 1.
Product Specifications 2.6. Physical Specifications Refer to Table 2-6 and to Figures 2-1 through 2-3 for SD Card physical specifications and dimensions. Table 2-6. Physical Specifications Weight 2.0 g. maximum Length: 32mm ± 0.1mm Width: 24mm ± 0.1mm Thickness: 2.1mm ± 0.15mm (in substrate area only, 2.25mm maximum) Figure 2-1. SD Card Dimensions SanDisk Secure Digital (SD) Card Product Manual, Rev. 1.
Product Specifications Figure 2-2. SD Card Dimensions 2-4 SanDisk Secure Digital (SD) Card Product Manual, Rev. 1.
Product Specifications Figure 2-3. SD Card Dimensions SanDisk Secure Digital (SD) Card Product Manual, Rev. 1.
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3. SD Card Interface Description 3.1. General Description of Pins and Registers The SD Card has nine exposed contacts on one side (see Figure 3-1). The host is connected to the SD Card using a dedicated 9-pin connector. 3.1.1. Pin Assignments in SD Card Mode Table 3-1 lists the pin assignments and definitions in SD Card Mode. Table 3-1.
SD Card Interface Description 3.1.2. Pin Assignments in SPI Mode Table 3-2 lists the pin assignments and definitions in SPI Mode. Table 3-2.
SD Card Interface Description Figure 3-1. SD Card Architecture 3.2. SD Bus Topology The SD bus has six communication lines and three supply lines: • • • • • CMD—Command is a bi-directional signal. (Host and card drivers are operating in push pull mode.) DAT0-3—Data lines are bi-directional signals. (Host and card drivers are operating in push pull mode.) CLK—Clock is a host to cards signal. (CLK operates in push pull mode.) VDD—VDD is the power supply line for all cards.
SD Card Interface Description Figure 3-2 shows the bus topology of several cards with one host in SD Bus mode. HOST CLK CLK Vdd Vss Vdd Vss D0-3(A), CMD(A) SD Memory Card (A) D0-D3, CMD CLK Vdd Vss D0-3(B), CMD(B) SD Memory Card (B) D0-D3, CMD CLK Vdd Vss D0-3(C) CMD(C) D0, CS, CMD MultiMediaCard (C) D1&D2 Not Connected Figure 3-2.
SD Card Interface Description R DAT RCMD RWP Write Protect Vss CMD DAT0-3 SD Memory CLK C1 C 2 Card Host C3 9 1 2 3 4 5 6 78 SD Memory Card Figure 3-3. Bus Circuitry Diagram RDAT and RCMD are pull-up resistors protecting the CMD and the DAT line against bus floating when no card is inserted or when all card drivers are in a hi-impedance mode. RWP is used for the Write Protect Switch. See Section 5.4.2 for the component values and conditions.
SD Card Interface Description Another SPI common characteristic, which is implemented in the SD Card as well, is byte transfers. All data tokens are multiples of 8-bit bytes and always byte aligned to the CS signal. The SPI standard defines the physical link only and not the complete data transfer protocol. In SPI Bus mode, the SD Card uses a subset of the SD Card protocol and command set. The SD Card identification and addressing algorithms are replaced by a hardware Chip Select (CS) signal.
SD Card Interface Description 3.4.1. Power-up The power up of the SD Card bus is handled locally in each SD Card and in the bus master. Logic working level Supply voltage VDD max Valid voltage range for commands CMD0, 15, 55, and ACMD41 Bus master supply voltage Valid voltage range for all other commands and memory access.
SD Card Interface Description 3.4.2. Bus Operating Conditions SPI Mode bus operating conditions are identical to SD Card mode bus operating conditions. Table 3-4 lists the power supply voltages. The CS (chip select) signal timing is identical to the input signal timing (see Figure 3-7). Table 3-4. Power Supply Voltage General Parameter Symbol Peak voltage on all lines Min. Max. Unit -0.3 VDD+0.
SD Card Interface Description 3.4.4. Bus Signal Levels As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage (see Figure 3-6). Figure 3-6. Bus Signal Levels To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within the specified ranges in Table 3-6 for any VDD of the allowed voltage range. Table 3-6.
SD Card Interface Description 3.4.5. Bus Timing fPP 0.7 tWL tWH 0.2 Clock VIH tTLH tTHL tISU VIL tIH VIH Input VIL VOH Output VOL tO DLY tO DLY (max) (min) Shaded areas are not valid. Figure 3-7. Timing Diagram Data Input/Output Referenced to Clock Table 3-7. Bus Timing Parameter Symbol Min. Max. Unit Remark Clock CLK (All values are referred to min. (VIH) and max.
SD Card Interface Description Parameter Symbol Min. Max. Unit Remark Inputs CMD, DAT (referenced to CLK) Input set-up time tISU 5 ns CL ≤ 25 pF (1 cards) Input hold time tIH 5 ns CL ≤ 25 pF (1 cards) CL ≤ 25 pF (1 cards) Outputs CMD, DAT (referenced to CLK) NOTE: Output delay time during Data Transfer Mode tODLY 0 14 ns Output delay time during Identification Mode tODLY 0 50 ns CL ≤ 25 pF (1 cards) OHz stops the clock.
SD Card Interface Description OCR Bit VDD Voltage Window 17 2.9-3.0 18 3.0-3.1 19 3.1-3.2 20 3.2-3.3 21 3.3-3.4 22 3.4-3.5 23 3.5-3.6 24-30 reserved 31 Card power up status bit (busy) The level coding of the OCR register is as follows: • • Restricted voltage windows=LOW Card busy=LOW (bit 31) The least significant 31 bits are constant and will be set as described in Figure 4-8. If bit 32 (the busy bit) is set, it informs the host that the card power up procedure is finished.
SD Card Interface Description Table 3-9. CID Fields Name Type Width CID—Slice Comments Manufacturer ID (MID) Binary 8 [127:120] The manufacturer IDs are controlled and assigned by the SD Card Association. 0x03 OEM/Application ID (OID) ASCII 16 [119:104] Identifies the card OEM and/or the card contents. The OID is assigned by the 3C.
SD Card Interface Description Name Field Width Cell Type CSD-Slice CSD Value CSD Code max.
SD Card Interface Description NOTE: The device size indicates the user area size. It does not include the protected area that is used for security applications and is about 1 percent of the total card size. The following sections describe the CSD fields and the relevant data types. If not explicitly defined otherwise, all bit strings are interpreted as binary coded numbers starting with the left bit first. CSD_STRUCTURE—describes the version of the CSD structure. Table 3-11.
SD Card Interface Description Table 3-14. Supported Card Command Classes CCC Bit Supported Card Command Class 0 class 0 1 class 1 ...... 11 class 11 READ_BL_LEN—The maximum read data block length is computed as 2READ_BL_LEN. The maximum block length might therefore be in the range 512...2048 bytes. Note that in the SD Card, the WRITE_BL_LEN is always equal to READ_BL_LEN. Table 3-15. Data Block Length READ_BL_LEN Block Length 0-8 9 Reserved 29 = 512 Bytes ......
SD Card Interface Description 1 DSR implemented C_SIZE (Device Size)—This parameter is used to compute the card capacity (does not include security protected area).
SD Card Interface Description ERASE_BLK_EN—defines whether erase of one write block (see WRITE_BL_LEN) is allowed (other than SECTOR_SIZE given below). If ERASE_BLK_EN is 0, the host can erase a unit of SECTOR_SIZE. If ERASE_BLK_EN is 1, the host can erase either a unit of SECTOR_SIZE or a unit of WRITE_BLK_LEN. SECTOR_SIZE—The size of an erasable sector. The contents of this register is a 7-bit binary coded value, defining the number of write blocks (see WRITE_BL_LEN).
SD Card Interface Description COPY—This bit marks the card as an original (‘0’) or non-original (‘1’). Once set to non-original, this bit cannot be reset to original. The definition of “original” and “non-original” is application dependent and changes no card characteristics. PERM_WRITE_PROTECT—Permanently protects the whole card content, except the secured protected area, against overwriting or erasing (all write and erase commands for this card are permanently disabled). The default value is ‘0’, i.e.
SD Card Interface Description Table 3-24. SCR Register Structure Version CSD_STRUCTURE CSD Structure Version 0 SCR version No. 1.0 1-15 Valid for SD Physical Layer Specification Version Version 1.0-1.01 reserved SD_SPEC—Describes the SD Card Physical Layer Specification version supported by this card. Table 3-25. SD Card Physical Layer Specification Version SPEC_VERS 0 Physical Layer Specification Version Number Version 1.0-1.
SD Card Interface Description • • Card Status—This status field is compatible to the MultiMediaCard protocol. SD_Status—This extended status field of 512 bits supports special features unique to the SD Card and future application specific features. The SD Card status registers’ structures are defined in Table 3-28. The Type and Clear-Condition fields in the table are coded as follows: Type: • • • • E—Error bit. S—Status bit. R—Detected and set for the actual command response.
SD Card Interface Description Bits Identifier Type Value 18 Reserved 17 Reserved 16 CID/ CSD_OVERWRITE ERX ’0’= no error ’1’= error Description Can be either one of the following errors: Clear Cond. C - The CID register has been already written and can not be overwritten - The read only section of the CSD does not match the card content. - An attempt to reverse the copy (set as original) or permanent WP (unprotected) bits was made.
SD Card Interface Description 3.5.6. SD Status The SD Status contains status bits that are related to the SD Card proprietary features and may be used for future application specific usage. The size of the SD Status is one data block of 512 bits. The content of this register is transmitted to the Host over the DAT bus along with 16 bits CRC. The SD Status is sent to the host over the DAT bus if ACMD13 is sent (CMD55 followed with CMD13). ACMD13 can be sent to a card only in ‘tran_state’ (card selected).
SD Card Interface Description 3.5.8. SD Card Registers in SPI Mode In SPI mode, all the card’s registers are accessible. Their format is identical to the format in the SD Card mode. However, a few fields are irrelevant in SPI mode. In SPI mode, the card status register has a different, shorter, format as well. Refer to the SPI Protocol section for more details. 3.6. Data Interchange Format and Card Sizes In general, SD Card data is structured by means of a file system.
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4. Secure Digital (SD) Card Protocol Description 4.1. SD Bus Protocol Communication over the SD bus is based on command and data bit streams, which are initiated by a start bit and terminated, by a stop bit: • • • Command—A command is a token that starts an operation. A command is sent from the host either to a single card (addressed command) or to all connected cards (broadcast command). A command is transferred serially on the CMD line.
Secure Digital (SD) Card Protocol Description From host to card(s) From card to host Command CMD Stop command stops data transfer Data from card to host Command Response DAT Data block crc Data block crc Data block Response crc Data stop operation Block read operation Multiple block read operation Figure 4-2.
Secure Digital (SD) Card Protocol Description Response tokens have four coding schemes depending on their content. The token length is either 48 or 136 bits. The CRC protection algorithm for block data is a 16-bit CCITT polynomial. All used CRC types are described in Section 4.6.
Secure Digital (SD) Card Protocol Description MSB (4095) LSB (0) End bt: always '1' Start bit always '0' Standard busy (only DAT0 used): 0 CRC 1 Block length MSN LSN End bt: always '1' Start bit always '0' Wide bus (all four data lines used): DAT3 0 4095 3 CRC 1 DAT2 0 4094 2 CRC 1 DAT1 0 4093 1 CRC 1 DAT0 0 4092 0 CRC 1 Block length /4 Figure 4-6. Data Packet Format 4.2.
Secure Digital (SD) Card Protocol Description Two operation modes are defined for SD Cards: • • Card Identification Mode—The host will be in card identification mode after reset and while it is looking for new cards on the bus. SD Cards will be in this mode after reset until the SEND_RCA command (CMD3) is received. Data Transfer Mode—SD Cards will enter data transfer mode once their RCA is first published. The host will enter data transfer mode after identifying all of the SD Cards on the bus.
Secure Digital (SD) Card Protocol Description Power On SPI Operation Mode CMD0 CS Asserted ("0") Card is Busy or Host ommitted voltage range Idle State (idle) CMD0 ACMD41 Inactive State (ina) No response (non-valid command) Must be an MMC Start MMC initialization process starting at CMD1 Ready State (ready) From all states except (ina) CMD15 Cards with non-compatible voltage range CMD2 Identification State (ident) Card Identification Mode Data Transfer Mode CMD3 Card responds with new RCA
Secure Digital (SD) Card Protocol Description 4.3.2. Operating Voltage Range Validation The SD Physical Specification standard requires that all SD Cards will be able to establish communication with the host using any operating voltage between VDD-min and VDD-max. However, during data transfer, minimum and maximum values for VDD are defined in the operation condition register (OCR) and may not cover the whole range.
Secure Digital (SD) Card Protocol Description After the bus is activated, the host will request the cards to send their valid operation conditions (ACMD41 preceding with APP_CMD—CMD55 with RCA=0x0000). The response to ACMD41 is the operation condition register of the card. The same command shall be send to all of the new cards in the system. Incompatible cards are sent into Inactive State. The host then issues the command ALL_SEND_CID (CMD2) to each card to get its unique card identification (CID) number.
Secure Digital (SD) Card Protocol Description Card Identification mode CMD3 CMD15 CMD0 Sending-data state (data) Data-transfer mode From all states in data-transfer mode CMD13, CMD55 CMD12 "operation complete" No state transition in data-transfer mode CMD17, 18, 30, 56(r) ACMD51 CMD7 Stand-by state (stby) CMD7 CMD4, 9, 10 CMD28, 29, 38 "Operation complete" "Operation complete" Transfer state (tran) CMD 16, 32...
Secure Digital (SD) Card Protocol Description • • • • • • • • • • • All data read commands may be aborted any time by the stop command (CMD12). The data transfer will terminate and the card will return to the Transfer State. The read commands are: block read (CMD17), multiple block read (CMD18), send write protect (CMD30), send scr (ACMD51) and general command in read mode (CMD56). All data write commands can be aborted any time by the stop command (CMD12).
Secure Digital (SD) Card Protocol Description The code is a shortened BCH code with d=4 and is used for payload length of up to 2048 Bytes. Note that the CRC check sum is calculated and attached to each DAT line at the end of the block. In the case of a wide bus operation (DAT0-DAT3), the 16-bit CRC is calculated separately for each DAT line. Block Read A block read is a block-oriented data transfer. The basic unit of data transfer is a block whose maximum size is defined in the CSD (READ_BL_LEN).
Secure Digital (SD) Card Protocol Description After receiving a block of data and completing the CRC check, the card will begin writing and hold the DAT0 line low if its write buffer is full and unable to accept new data from a new WRITE_BLOCK command. The host may poll the status of the card with a SEND_STATUS command (CMD13) at any time, and the card will respond with its status.
Secure Digital (SD) Card Protocol Description As described above for block write, the card will indicate that an erase is in progress by holding DAT0 low. The actual erase time may be quite long, and the host may issue CMD7 to deselect the card or perform card disconnection, as described in the Block Write section, above. The data at the card after an erase operation is either ‘0’ or ‘1’, depending on the card vendor. The SCR register bit DATA_STAT_AFTER_ERASE (bit 55) defines whether it is ‘0’ or ‘1’. 4.
Secure Digital (SD) Card Protocol Description The only effect of the APP_CMD is that if the command index of the immediately following command has an ACMD overloading it, the non standard version will be used. For example, a card has a definition for ACMD13 but not for ACMD7. Therefore, if Command 13 is received immediately after APP_CMD command, it would be interpreted as the non standard ACMD13, whereas command 7, similarly received, would be interpreted as the standard CMD7.
Secure Digital (SD) Card Protocol Description 100KHz-400KHz Clocks 1) CLK 1st CMD 2nd 3rd (ACMD41) Polling less than 50ms interval 2) CLK <50ms 1st CMD <50ms 2nd 3rd (ACMD41) Figure 4-9. Host Procedures Waiting for Card to be Ready • • It is an obvious requirement that the clock must be running for the SD Card to output data or response tokens.
Secure Digital (SD) Card Protocol Description Figure 4-10. CRC7 Generator/Checker CRC16 When one DAT line is used (as in the MultiMediaCard), the CRC16 is used for payload protection in block transfer mode. The CRC check sum is a 16-bit value and is computed as follows: generator polynomial G(x) = x16 + x12 +x5 +1 M(x) = (first bit) * xn + (second bit)* xn-1 +...+ (last bit) * x0 CRC[15...0] = Remainder [(M(x) * x16 ) / G(x)] The first bit is the first data bit of the corresponding block.
Secure Digital (SD) Card Protocol Description 4.7. Error Conditions The following sections provide valuable information on error conditions. 4.7.1. CRC and Illegal Command All commands are protected by CRC bits. If the addressed SD Card’s CRC check fails, the card does not respond and the command is not executed. The SD Card does not change its state, and COM_CRC_ERROR bit is set in the status register.
Secure Digital (SD) Card Protocol Description 4.8.1. Command Types There are four kinds of commands defined to control the SD Card: • • • • Broadcast Commands (bc), no response—The broadcast feature is applicable only if all the CMD lines are connected together in the host. If they are separated then each card will accept it separately on his turn. Broadcast Commands with Response (bcr)—response from all cards simultaneously.
Secure Digital (SD) Card Protocol Description Table 4-2.
Secure Digital (SD) Card Protocol Description 4.8.4. Detailed Command Description Tables 4-3 through 4-9 define in detail the SD Card bus commands. Table 4-3. Basic Commands (Class 0 And Class 1) Cmd Index Type Argument Resp Abbreviation CMD0 bc [31:0] don’t care* - GO_IDLE_STATE CMD1 Resets all cards to Idle State.
Secure Digital (SD) Card Protocol Description Table 4-4. Block Read Commands (Class 2) Cmd Index Type Argument Resp Abbreviation CMD16 ac [31:0] block length R1 SET_BLOCKLEN Selects a block length (in bytes) for all following block commands (read and write).1 CMD17 adtc [31:0] data address R1 READ_SINGLE_ BLOCK Reads a block of the size selected by the SET_BLOCKLEN command.
Secure Digital (SD) Card Protocol Description Table 4-7. Erase Commands (Class 5) Cmd Index Type Argument Resp Abbreviation CMD32 ac [31:0] data address R1 ERASE_WR_BLK_START Sets the address of the first write block to be erased. CMD33 ac [31:0] data address R1 ERASE_WR_BLK_END Sets the address of the last write block of the continuous range to be erased.
Secure Digital (SD) Card Protocol Description Table 4-10 describes all the application specific commands supported/reserved by the SD Card. All the following ACMDs shall be preceded with APP_CMD command (CMD55). Table 4-10. Application Specific Commands Used/Reserved by SD Card ACMD INDEX Type Argument Resp. Abbreviation Command Description ACMD6 ac [31:2] stuff bits [1:0]bus width R1 SET_BUS_WIDTH Defines the data bus width (’00’=1bit or ’10’=4 bits bus) to be used for data transfer.
Secure Digital (SD) Card Protocol Description 4.9. Card State Transition Table Table 4-11 defines the SD Card state transitions in dependency of the received command. Table 4-11.
Secure Digital (SD) Card Protocol Description Current State idle ready ident stby tran data rcv prg dis ina CMD32 - - - - tran - - - - - CMD33 - - - - tran - - - - - CMD38 - - - - prg - - - - - Class 7 CMD42 This is an SDA optional command supported by the SanDisk SD Card.
Secure Digital (SD) Card Protocol Description Bits 45:40 indicate the index of the command to which it is responding. The status of the card is coded in 32 bits. Note that when a data transfer to the card is involved, a busy signal may appear on the data line after the transmission of each block of data. The host will check for busy after the data block transmission. Table 4-12.
Secure Digital (SD) Card Protocol Description Table 4-15. R6 Response Bit Position 47 46 [45:40] Width (bits) 1 1 6 16 Value ‘0’ ‘0’ x x start bit transmission bit Command index (‘000011’) Description [39:8] Argument Field [7:1] 0 16 7 1 x x ‘1’ CRC7 end bit New published RCA [15:0] card status bits: [31:16] of the card 23,22,19,12:0 (see Table 4-28) 4.11. Timings All timing diagrams use the schematics and abbreviations listed in Table 4-16. Table 4-16.
Secure Digital (SD) Card Protocol Description CMD <------Host command ----> <-NID cycles -> S T content CRC E Z Z P * * * P S T <--- CID or OCR ---> content Z Z Z Figure 4-12. Identification Timing (Card Identification Mode) Assign a card relative address The SEND_RELATIVE_ADDR (CMD 3) for SD Card timing is given bellow. Note that CMD3 command’s content, functionality and timing are different for MultiMediaCard. The minimum delay between the host command and card response is NCR clock cycles.
Secure Digital (SD) Card Protocol Description CMD DAT <----- Host command -----> <-NCR cycles-> <-------- Response ---------> S T content CRC E Z Z P * * * P S T content CRC E <------- NAC cycles -------> <- Read Data Z Z Z **** Z Z Z Z Z Z P **** **** P S D D D *** Figure 4-16. Timing of Single Block Read Data transmission from the card starts after the access time delay NAC beginning from the end bit of the read command.
Secure Digital (SD) Card Protocol Description <-Host cmnd-> <- NCR -> <-Card response > CMD E Z Z P * P S T Content CRC E Z Z P **************** P P P P P P P P <-NWR-> <- Write data -> CRC status <- Busy -> DAT0 Z Z * * * * * * Z Z Z * * * Z Z Z Z P * P S content CRC E Z Z S Status E S L*L E Z DAT1-3 Z Z * * * * * * Z Z Z * * * Z Z Z Z P * P S content CRC E Z Z X X X X X X X X X Z Figure 4-19. Timing of the Block Write Command Note that the CRC response output is always two clocks after the end of data.
Secure Digital (SD) Card Protocol Description CMD DAT <---- Host Command ----> < Ncr Cycles > <----- Card response-----> S T content CRC E Z Z P P******P S T content CRC E --Data block-> CRC Status1 Å------------Card is programming ----------Æ D D D D D Z Z S Status E Z Z S L * * * * * * ** * * * * * * * * * * * * S T Content E Z Z Z Z Z Z Z Z 1) The card CRC status response was interrupted by the host. Figure 4-22.
Secure Digital (SD) Card Protocol Description 4.11.4. Timing Values Table 4-17 defines all timing values. For more information, refer to Table 5-5 and 5.1.9.2 in Section 5.0, and the applications note in Appendix A, “Host Design Considerations: NAND MMC and SD-based Products.” Table 4-17. Timing Values Min. Max. Unit NCR 2 64 Clock Cycles NID 5 5 Clock Cycles NAC 2 See note.
5. SPI Protocol Definition 5.1. SPI Bus Protocol While the SD Card channel is based on command and data bit-streams, which are initiated by a start bit and terminated by a stop bit, the SPI channel is byte oriented. Every command or data block is built of eight bit bytes and is byte aligned (multiples of eight clocks) to the CS signal. Similar to the SD Bus protocol, the SPI messages are built from command, response and data-block tokens.
SPI Protocol Definition 5.1.2. Bus Transfer Protection Every SD Card token transferred on the bus is protected by CRC bits. In SPI mode, the SD Card offers a non protected mode which enables systems built with reliable data links to exclude the hardware or firmware required for implementing the CRC generation and verification functions.
SPI Protocol Definition Figure 5-2. Read Operation—Data Error In the case of a Multiple Block Read operation, every transferred block has a 16-bit CRC suffix. The Stop Transmission command (CMD12) will actually stop the data transfer operation (the same as in SD Bus mode). Stop Transmission command From host to card(s) From card to host DataIn Data from card to host Command Command Response DataOut From card to host Data Block CRC Data Block CRC Response Figure 5-3.
SPI Protocol Definition In Multiple Block write operation the stop transmission will be done by sending ’Stop Tran’ token instead of ’Start Block’ token at the beginning of the next block. In case of Write Error indication (on the data response) the host shall use SEND_NUM_WR_BLOCKS (ACMD22) in order to get the number of well written write blocks. The data token’s description is given in Section 5.2.4.
SPI Protocol Definition The data time out for the CSD command cannot be set to the card TAAC since this value is stored in the CSD. Therefore, the standard response time-out value (NCR) is used for read latency of the CSD register. 5.1.7. Reset Sequence The SD Card requires a defined reset sequence. After power on reset or CMD0 (software reset), the card enters an idle state.
SPI Protocol Definition There are a few restrictions the SPI host must follow: • • • The bus frequency can be changed at any time (under the restrictions of maximum data transfer frequency, defined by the SD Cards). It is an obvious requirement that the clock must be running for the SD Card to output data or response tokens. After the last SPI bus transaction, the host is required to provide 8 (eight) clock cycles for the card to complete the operation before shutting down the clock.
SPI Protocol Definition SanDisk Secure Digital (SD) Card Product Manual, Rev. 1.
SPI Protocol Definition Read The read access time is defined as the sum of the two times given by the CSD parameters TAAC and NSAC. These card parameters define the typical delay between the end bit of the read command and the start bit of the data block. Write The R2W_FACTOR field in the CSD is used to calculate the typical block program time obtained by multiplying the read access time by this factor. It applies to all write/erase commands (e.g.
SPI Protocol Definition Commands and arguments are listed in Table 5-2. 7-bit CRC Calculation: G(x) = x7 + x3 + 1 M(x) = (start bit)∗x39 + (host bit)∗x38 +...+ (last bit before CRC)∗x0 CRC[6...0] = Remainder[(M(x)∗x7)/G(x)] 5.2.2. Command Classes As in SD mode, the SPI commands are divided into several classes (See Table 5-1). Each class supports a set of card functions.
SPI Protocol Definition Table 5-2. Description of SPI Bus Commands CMD INDEX SPI Mode Argument Resp Abbreviation CMD0 Yes None R1 GO_IDLE_STATE Resets the SD Card CMD1 Yes None R1 SEND_OP_COND Activates the card’s initialization process. CMD2 No CMD3 No CMD4 No CMD5 Reserved CMD6 Reserved CMD7 Command Description No CMD8 Reserved CMD9 Yes None R1 SEND_CSD Asks the selected card to send its card-specific data (CSD).
SPI Protocol Definition CMD INDEX SPI Mode Argument Resp Abbreviation Command Description CMD26 No CMD27 Yes None R1 PROGRAM_CSD Programming of the programmable bits of the CSD. CMD281 Yes [31:0] data address R1b SET_WRITE_PROT If the card has write protection features, this command sets the write protection bit of the addressed group. The properties of write protection are coded in the card specific data (WP_GRP_SIZE).
SPI Protocol Definition Table 5-3 describes all the application specific commands supported or reserved by the SD Card. All the following commands should be preceded with APP_CMD (CMD55). Table 5-3. Application Specific Commands Used or Reserved by the SD Card–SPI Mode CMD INDEX SPI Mode ACMD6 No ACMD13 Yes Argument Resp Abbreviation [31:0] stuff bits R2 SD_STATUS ACMD17 ACMD18 Command Description Send the SD Card status.
SPI Protocol Definition 5.2.3.1. Format R1 This response token is sent by the card after every command with the exception of SEND_STATUS commands. It is 1 byte long, the MSB is always set to zero and the other bits are error indications. A ‘1’ signals error. • • • • • • • In idle state—The card is in idle state and running initializing process. Erase reset—An erase sequence was cleared before executing because an out of erase sequence command was received.
SPI Protocol Definition 7 Byte 1 0 7 Byte 2 0 0 Card is Locked WP Erase Skip, Lock/Unlock Cmd Failed Error CC Error Card ECC Failed WP Violation Erase Param Out of Range, CSD_Overwrite In Idle State Erase Reset Illegal Command Com CRC Error Erase Sequence Error Address Error Parameter Error Figure 5-8. R2 Response Format The first byte is identical to response R1. The content of the second byte is described below: • • • • • • • Erase param—An invalid selection, sectors for erase.
SPI Protocol Definition 5.2.3.5. Data Response Every data block written to the card is acknowledged by a data response token. It is one byte long and has the following format: 7 6 x x x 0 0 Status 1 The meaning of the status bits is defined as follows: • • • ‘010’—Data accepted. ‘101’—Data rejected due to a CRC error. ’110’—Data Rejected due to a Write Error In case of any error (CRC or Write Error) during Write Multiple Block operation, the host shall stop the data transmission using CMD12.
SPI Protocol Definition 1 1 1 1 1 1 0 1 Note that this format is used only for Multiple Block Write. In case of Multiple Block Read the stop transmission is done using STOP_TRAN Command (CMD12). 5.2.5. Data Error Token If a read operation fails and the card cannot provide the required data it will send a data error token, instead. This token is one byte long and has the format shown in Figure 5-10. 7 0 0 0 0 Error CC Error Card ECC Failed Out of Range Card is Locked Figure 5-10.
SPI Protocol Definition Table 5-4. SPI Bus Timing Abbreviations H Signal is high (logical ‘1’) L Signal is low (logical ‘0’) X Don’t care Z High impedance state (-> = 1) * Repeater Busy Busy Token Command Command token Response Response token Data block Data token All timing values are defined in Table 5-5. The host must keep the clock running for at least NCR clock cycles after the card response is received. This restriction applied to command and data response tokens. 5.4.1.
SPI Protocol Definition 5.4.2. Data Read The following timing diagram describes all single block read operations with the exception of SEND_CSD command. CS DataIN H L L L <-NCS-> X H H H H **************************** Read Command DataOut Z Z H H H H L L L H H H H <-NEC-> H H H X X X X H H H H H ************************* <-NCR-> <-NAC-> H H H H Card Response H H H H Data Block H H H H Z Z Z ******** Figure 5-14.
SPI Protocol Definition The following figure describes stop transmission operation in Multiple Block Write transfer. CS Data In L L L L L L L L L L L L L L L L L L L L L L H H H L L L L <1byte-> <- NDS-> Data Block H H H H H H H H H stop tran H H H X X X H H H H token Data Out H H H H Data Resp Busy H H H H H H H H H Busy(1) L Z Z Z Busy(1) H (1) The Busy may appear within NBR clocks after Stop Tran Token. If there is no Busy, the host may continue to the next command.
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Appendix A. Application Note Host Design Considerations: NAND MMC and SD-based Products Introduction SanDisk’s MultiMediaCard (MMC) and Secure Digital (SD) Card have been designed into a wide variety of consumer electronic products: MP3 players, cell phones, PDAs, digital still and video cameras, data loggers, and more. Although these cards were designed to support this wide range of products, there are many options an engineer needs to consider before designing a card slot into a product.
Application Note Read (TAAC + NSAC) 100ms Write (TAAC + NSAC) * R2W_FACTOR 250 ms The factors used in calculating the values in Table 1—TAAC, NSAC, and R2W_FACTOR—can be read directly from the CSD register of the MultiMediaCard and SD Card. The TAAC factor’s unit is time, and the NSAC factor has units of 100 clocks. You can convert TAAC units to clock cycles by multiplying by the frequency of the clock and calculate the time-outs in units of clock cycles if desired.
Ordering Information and Technical Support The example in Table 3 shows the difference between moving 512 bytes of data to and from a MultiMediaCard or SD Card internal buffer using different bus modes. SanDisk Secure Digital (SD) Card Product Manual, Rev. 1.
Application Note Table 3. MultiMediaCard and SD Card Clock Speed and Transfer Time Product Maximum Clock Speed and Time Req. to move 512 bytes MultiMediaCard Clock Speed Time SPI Bus mode 20 MHz 204.8 us MMC 1-bit mode 20 MHz 204.8 us SPI Bus mode 25 MHz 163.8 us SD 1-bit mode 25 MHz 163.8 us SD 4-bit mode 25 MHz 41 us SD Card Read/Write Mode Selection Another major MultiMediaCard and SD Card design consideration is the use of Singleblock or Multiblock command modes.
Ordering Information and Technical Support Initialization Algorithm The initialization algorithm needs to be considered for products designed to support the MultiMediaCard and SD Card or SD Card only. An SD socket is physically thicker which allows both types of cards to be inserted. Therefore, the host needs to be able to detect which card is inserted into the socket.
Appendix B. Ordering Information To order SanDisk products directly from SanDisk, call 408-542-0595. Secure Digital Card SDSDB-16 SDSDB-32 SDSDJ-64 SDSDJ-128 SDSDJ-256 SDSDJ-512 SDSDJ-1024 16 MB 32 MB 64 MB 128 MB 256 MB 512 MB 1024 MB SanDisk Secure Digital (SD) Card Product Manual, Rev. 1.
Appendix C. SanDisk Worldwide Sales Offices To order SanDisk products directly from SanDisk, call 408-542-0595. SanDisk Corporate Headquarters U.S. Retail Sales 140 Caspian Court Sunnyvale, CA 94089 Tel: 408-542-0500 Fax: 408-542-0503 http://www.sandisk.com Americas 10 Flagstone Trabuco Canyon, CA 92679 Tel: 949-589-8351 Fax: 949-589-8364 U.S. Industrial/OEM Sales Northwest USA 2241 Fremont Dr.
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Appendix D. Limited Warranty I. WARRANTY STATEMENT SanDisk warrants its products to be free of any defects in materials or workmanship that would prevent them from functioning properly for one year from the date of purchase. This express warranty is extended by SanDisk Corporation to its customers. II. GENERAL PROVISIONS This warranty sets forth the full extent of SanDisk’s responsibilities regarding the SanDisk Secure Digital Card.
Limited Warranty IV. RECEIVING WARRANTY SERVICE According to SanDisk’s warranty procedure, defective product should be returned only with prior authorization from SanDisk Corporation. Please contact SanDisk’s Customer Service department at 408-542-0595 with the following information: product model number and description, nature of defect, conditions of use, proof of purchase and purchase date. If approved, SanDisk will issue a Return Material Authorization or Product Repair Authorization number.
Appendix E. Disclaimer of Liability SanDisk Corporation general policy does not recommend the use of its products in life support applications wherein a failure or malfunction of the product may directly threaten life or injury. Accordingly, in any use of products in life support systems or other applications where failure could cause damage, injury or loss of life, the products should only be incorporated in systems designed with appropriate redundancy, fault tolerant or back-up features.
