Technical data

MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3

98 Freescale Semiconductor

Electrical Characteristics

4.3.23 USB Electrical Specifications

This section describes the electrical information of the USBOTG port. The OTG port supports both serial

and parallel interfaces.

The high speed (HS) interface is supported via the ULPI (Ultra Low Pin Count Interface). Figure 84

depicts the USB ULPI timing diagram, and Table 61 lists the timing parameters.

Figure 84. USB ULPI Interface Timing Diagram

SS28 (Rx) CK high to FS (bl) high –10.0 15.0 ns

SS30 (Rx) CK high to FS (bl) low 10.0 — ns

SS32 (Rx) CK high to FS (wl) high –10.0 15.0 ns

SS34 (Rx) CK high to FS (wl) low 10.0 — ns

SS35 (Tx/Rx) External FS rise time — 6.0 ns

SS36 (Tx/Rx) External FS fall time — 6.0 ns

SS40 SRXD setup time before (Rx) CK low 10.0 — ns

SS41 SRXD hold time after (Rx) CK low 2.0 — ns

Table 61. USB ULPI Interface Timing Specification

Timing parameters are given as viewed by transceiver side.

Parameter Symbol Min Max Units

Setup time (control in, 8-bit data in)

TSC, TSD 6— ns

Hold time (control in, 8-bit data in)

THC, THD 0 — ns

Output delay (control out, 8-bit data out)

TDC, TDD —9 ns

Table 60. SSI Receiver with External Clock Timing Parameters (continued)

ID Parameter Min Max Unit

Clock

Control out (stp)

Data out

Control in (dir, nxt)

Data in